changeset d8112aa18a1b in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=d8112aa18a1b
description:
        config: fixed ruby dma device connections

diffstat:

 configs/common/FSConfig.py          |  5 +++--
 configs/example/ruby_fs.py          |  2 +-
 configs/ruby/MESI_CMP_directory.py  |  5 ++---
 configs/ruby/MOESI_CMP_directory.py |  5 ++---
 configs/ruby/MOESI_CMP_token.py     |  5 ++---
 5 files changed, 10 insertions(+), 12 deletions(-)

diffs (78 lines):

diff -r acf43d6bbc18 -r d8112aa18a1b configs/common/FSConfig.py
--- a/configs/common/FSConfig.py        Tue Aug 24 12:07:22 2010 -0700
+++ b/configs/common/FSConfig.py        Tue Aug 24 13:20:31 2010 -0700
@@ -124,9 +124,10 @@
     self.tsunami.ethernet.pio = self.piobus.port
 
     #
-    # store the dma devices for later connection to dma ruby ports
+    # Store the dma devices for later connection to dma ruby ports.
+    # Append an underscore to dma_devices to avoid the SimObjectVector check.
     #
-    self.dma_devices = [self.tsunami.ide, self.tsunami.ethernet]
+    self._dma_devices = [self.tsunami.ide, self.tsunami.ethernet]
 
     self.simple_disk = SimpleDisk(disk=RawDiskImage(image_file = mdesc.disk(),
                                                read_only = True))
diff -r acf43d6bbc18 -r d8112aa18a1b configs/example/ruby_fs.py
--- a/configs/example/ruby_fs.py        Tue Aug 24 12:07:22 2010 -0700
+++ b/configs/example/ruby_fs.py        Tue Aug 24 13:20:31 2010 -0700
@@ -115,7 +115,7 @@
 system.ruby = Ruby.create_system(options,
                                  system,
                                  system.piobus,
-                                 system.dma_devices)
+                                 system._dma_devices)
 
 system.cpu = [CPUClass(cpu_id=i) for i in xrange(options.num_cpus)]
 
diff -r acf43d6bbc18 -r d8112aa18a1b configs/ruby/MESI_CMP_directory.py
--- a/configs/ruby/MESI_CMP_directory.py        Tue Aug 24 12:07:22 2010 -0700
+++ b/configs/ruby/MESI_CMP_directory.py        Tue Aug 24 13:20:31 2010 -0700
@@ -151,12 +151,11 @@
         dma_cntrl = DMA_Controller(version = i,
                                    dma_sequencer = dma_seq)
 
-        dma_cntrl.dma_sequencer.port = dma_device.dma
         exec("system.dma_cntrl%d = dma_cntrl" % i)
         if dma_device.type == 'MemTest':
-            system.dma_cntrl.dma_sequencer.port = dma_device.test
+            exec("system.dma_cntrl%d.dma_sequencer.port = dma_device.test" % i)
         else:
-            system.dma_cntrl.dma_sequencer.port = dma_device.dma
+            exec("system.dma_cntrl%d.dma_sequencer.port = dma_device.dma" % i)
         dma_cntrl_nodes.append(dma_cntrl)
 
     all_cntrls = l1_cntrl_nodes + \
diff -r acf43d6bbc18 -r d8112aa18a1b configs/ruby/MOESI_CMP_directory.py
--- a/configs/ruby/MOESI_CMP_directory.py       Tue Aug 24 12:07:22 2010 -0700
+++ b/configs/ruby/MOESI_CMP_directory.py       Tue Aug 24 13:20:31 2010 -0700
@@ -152,10 +152,9 @@
 
         exec("system.dma_cntrl%d = dma_cntrl" % i)
         if dma_device.type == 'MemTest':
-            system.dma_cntrl.dma_sequencer.port = dma_device.test
+            exec("system.dma_cntrl%d.dma_sequencer.port = dma_device.test" % i)
         else:
-            system.dma_cntrl.dma_sequencer.port = dma_device.dma
-        dma_cntrl.dma_sequencer.port = dma_device.dma
+            exec("system.dma_cntrl%d.dma_sequencer.port = dma_device.dma" % i)
         dma_cntrl_nodes.append(dma_cntrl)
 
     all_cntrls = l1_cntrl_nodes + \
diff -r acf43d6bbc18 -r d8112aa18a1b configs/ruby/MOESI_CMP_token.py
--- a/configs/ruby/MOESI_CMP_token.py   Tue Aug 24 12:07:22 2010 -0700
+++ b/configs/ruby/MOESI_CMP_token.py   Tue Aug 24 13:20:31 2010 -0700
@@ -178,10 +178,9 @@
 
         exec("system.dma_cntrl%d = dma_cntrl" % i)
         if dma_device.type == 'MemTest':
-            system.dma_cntrl.dma_sequencer.port = dma_device.test
+            exec("system.dma_cntrl%d.dma_sequencer.port = dma_device.test" % i)
         else:
-            system.dma_cntrl.dma_sequencer.port = dma_device.dma
-        dma_cntrl.dma_sequencer.port = dma_device.dma
+            exec("system.dma_cntrl%d.dma_sequencer.port = dma_device.dma" % i)
         dma_cntrl_nodes.append(dma_cntrl)
 
     all_cntrls = l1_cntrl_nodes + \
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