changeset 324323fe947b in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=324323fe947b
description:
Alpha: Initialize the data TLB mode IPR.
diffstat:
src/arch/alpha/process.cc | 3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diffs (13 lines):
diff -r fde051006c8c -r 324323fe947b src/arch/alpha/process.cc
--- a/src/arch/alpha/process.cc Sat Oct 09 12:41:31 2010 -0700
+++ b/src/arch/alpha/process.cc Sun Oct 10 20:37:39 2010 -0700
@@ -205,7 +205,8 @@
ThreadContext *tc = system->getThreadContext(contextIds[0]);
tc->setIntReg(GlobalPointerReg, objFile->globalPointer());
//Operate in user mode
- tc->setMiscRegNoEffect(IPR_ICM, 0x18);
+ tc->setMiscRegNoEffect(IPR_ICM, mode_user << 3);
+ tc->setMiscRegNoEffect(IPR_DTB_CM, mode_user << 3);
//No super page mapping
tc->setMiscRegNoEffect(IPR_MCSR, 0);
}
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