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src/arch/arm/isa/insts/swap.isa <http://reviews.m5sim.org/r/319/#comment717> Is this line too long now? Also, I'm not sure what's going on with the new 'IsStoreConditional' flag. Doesn't there need to be a load locked somewhere? Also, can't those fail? Would the x86 version of locking be more appropriate since it can't? Why is any flag necessary since the swap is (I think) done atomically through the memory request itself? Or are we moving away from that? src/cpu/o3/iew_impl.hh <http://reviews.m5sim.org/r/319/#comment718> The only difference between this else if and the if above it is that activityThisCycle is called for the if but not the else if. I'm not sure that's correct, though admittedly the use of the activity stuff in O3 is a little mysterious to me, but in any case I don't think it would hurt anything to call it in both cases and merge those two blocks. - Gabe On 2010-11-19 16:12:35, Ali Saidi wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.m5sim.org/r/319/ > ----------------------------------------------------------- > > (Updated 2010-11-19 16:12:35) > > > Review request for Default. > > > Summary > ------- > > O3: Support SWAP and predicated loads/store in ARM. > > > Diffs > ----- > > src/arch/arm/isa/insts/swap.isa 6286bb50127e > src/cpu/o3/iew.hh 6286bb50127e > src/cpu/o3/iew_impl.hh 6286bb50127e > src/cpu/o3/lsq_unit_impl.hh 6286bb50127e > > Diff: http://reviews.m5sim.org/r/319/diff > > > Testing > ------- > > > Thanks, > > Ali > >
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