For anybody waiting for an x86 FS regression (yes, I know, you can
all hardly wait, but don't let this spoil your Thanksgiving) I'm getting
closer to having it working, but I've discovered some issues with the
mechanisms behind the --caches flag with fs.py and x86. I'm surprised I
never thought to try it before. It also brings up some questions about
where the table walkers should be hooked up in x86 and ARM. Currently
it's after the L1, if any, but before the L2, if any, which seems wrong
to me. Also caches don't seem to propagate requests upwards to the CPUs
which may or may not be an issue. I'm still looking into that.

Gabe
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