changeset 8e8fa2f28f2e in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=8e8fa2f28f2e
description:
X86: Obey the PCD (cache disable) bit in the page tables.
diffstat:
src/arch/x86/tlb.cc | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diffs (12 lines):
diff -r 6246338ac1e9 -r 8e8fa2f28f2e src/arch/x86/tlb.cc
--- a/src/arch/x86/tlb.cc Mon Nov 22 05:49:03 2010 -0500
+++ b/src/arch/x86/tlb.cc Tue Nov 23 06:10:17 2010 -0500
@@ -653,6 +653,8 @@
Addr paddr = entry->paddr | (vaddr & (entry->size-1));
DPRINTF(TLB, "Translated %#x -> %#x.\n", vaddr, paddr);
req->setPaddr(paddr);
+ if (entry->uncacheable)
+ req->setFlags(Request::UNCACHEABLE);
} else {
//Use the address which already has segmentation applied.
DPRINTF(TLB, "Paging disabled.\n");
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