changeset 60051d2262c2 in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=60051d2262c2 description: Import changeset
diffstat: system/alpha/console/Makefile | 44 + system/alpha/console/console.c | 1126 +++++ system/alpha/console/dbmentry.s | 213 + system/alpha/console/paljtokern.s | 155 + system/alpha/console/paljtoslave.s | 150 + system/alpha/console/paljtoslave.tmp | 92 + system/alpha/console/printf.c | 298 + system/alpha/h/DEC21040.h | 409 ++ system/alpha/h/Makefile | 20 + system/alpha/h/address.h | 121 + system/alpha/h/am79c960.h | 381 + system/alpha/h/arp.h | 108 + system/alpha/h/base.h | 78 + system/alpha/h/bbram.h | 101 + system/alpha/h/bootp.h | 89 + system/alpha/h/bptable.h | 111 + system/alpha/h/buffer.h | 70 + system/alpha/h/cia.h | 457 ++ system/alpha/h/eb164.h | 186 + system/alpha/h/eb164mem.h | 71 + system/alpha/h/eb64.h | 180 + system/alpha/h/eb64l.h | 66 + system/alpha/h/eb64mem.h | 73 + system/alpha/h/eb64p.h | 265 + system/alpha/h/eb64pmem.h | 77 + system/alpha/h/eb66.h | 257 + system/alpha/h/eb66mem.h | 75 + system/alpha/h/eb66p.h | 66 + system/alpha/h/edevice.h | 249 + system/alpha/h/ether.h | 96 + system/alpha/h/ethernet.h | 218 + system/alpha/h/ev4.h | 704 +++ system/alpha/h/fat.h | 88 + system/alpha/h/flash.h | 101 + system/alpha/h/floppy.h | 171 + system/alpha/h/fregs.h | 80 + system/alpha/h/ip.h | 192 + system/alpha/h/isa_buff.h | 72 + system/alpha/h/k_extra.h | 89 + system/alpha/h/kbdscan.h | 86 + system/alpha/h/kernel.h | 278 + system/alpha/h/ladbx.h | 74 + system/alpha/h/ladbxapp.h | 56 + system/alpha/h/ledcodes.h | 62 + system/alpha/h/lib.h | 517 ++ system/alpha/h/libc.h | 204 + system/alpha/h/local.h | 58 + system/alpha/h/mem.h | 54 + system/alpha/h/mon.h | 158 + system/alpha/h/net_buff.h | 75 + system/alpha/h/netman.h | 79 + system/alpha/h/paldefs.h | 76 + system/alpha/h/pci.h | 203 + system/alpha/h/ppec.h | 33 + system/alpha/h/prtrace.h | 99 + system/alpha/h/regdefs.h | 83 + system/alpha/h/rom.h | 53 + system/alpha/h/romhead.h | 354 + system/alpha/h/rpb.h | 331 + system/alpha/h/server_t.h | 61 + system/alpha/h/ssb.h | 183 + system/alpha/h/sys.h | 253 + system/alpha/h/system.h | 89 + system/alpha/h/tftp.h | 87 + system/alpha/h/tga.h | 716 +++ system/alpha/h/tga_crystal.h | 760 +++ system/alpha/h/uart.h | 108 + system/alpha/h/udp.h | 197 + system/alpha/h/wga.h | 160 + system/alpha/h/xlate.h | 80 + system/alpha/h/xxm.h | 233 + system/alpha/h/xxmmem.h | 60 + system/alpha/palcode/Makefile | 157 + system/alpha/palcode/cserve.h | 107 + system/alpha/palcode/dc21164.h | 961 ++++ system/alpha/palcode/dc21164FromGasSources.h | 965 ++++ system/alpha/palcode/ev5_alpha_defs.h | 323 + system/alpha/palcode/ev5_defs.h | 575 ++ system/alpha/palcode/ev5_impure.h | 392 + system/alpha/palcode/ev5_osfalpha_defs.h | 160 + system/alpha/palcode/ev5_paldef.h | 185 + system/alpha/palcode/fromHudsonMacros.h | 145 + system/alpha/palcode/fromHudsonOsf.h | 554 ++ system/alpha/palcode/macros.h | 137 + system/alpha/palcode/osf.h | 545 ++ system/alpha/palcode/osfpal.s | 5123 ++++++++++++++++++++++++++ system/alpha/palcode/platform.h | 251 + system/alpha/palcode/platform_srcmax.s | 1825 +++++++++ system/alpha/palcode/platform_tlaser.s | 2814 ++++++++++++++ system/alpha/palcode/simos.h | 16 + system/alpha/palcode/xxm.sed | 5 + 91 files changed, 28559 insertions(+), 0 deletions(-) diffs (truncated from 28924 to 300 lines): diff -r 9c245e375e05 -r 60051d2262c2 system/alpha/console/Makefile --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/system/alpha/console/Makefile Fri Nov 14 10:52:42 2003 -0500 @@ -0,0 +1,44 @@ + +all: console + +DBMENTRY = fffffc0000010000 +INCLUDES = -I$(PALCODE) -I$(INCLUDEH) -I$(SIMTOOLS)/cpus-alpha/simos +#-I/udir/bugnion/ebfw/h -I/udir/bugnion/ebfw/palcode/xxm + +SOURDIR = ./ +EB_TOOLBOX = /wrl/proj/simos/bin/tools/osf +PALCODE = ../palcode +INCLUDEH = ../h + +dbmentry.o: dbmentry.s + $(AS) $(INCLUDES) -o $*.o $*.s + +console.o: console.c + $(CC) -g3 $(INCLUDES) -o $*.o -c $*.c + +printf.o: printf.c + $(CC) -g3 $(INCLUDES) -o $*.o -c $*.c + +paljtokern.o: $(SOURCEDIR)paljtokern.s + rm $(OBJDIR)paljtokern.i + cpp -I$(PALCODE) $(SOURCEDIR)paljtokern.s $(OBJDIR)paljtokern.i + $(EB_TOOLBOX)/gas -21164 -o $(OBJDIR)paljtokern.aout.o $(OBJDIR)paljtokern.i + $(EB_TOOLBOX)/astrip -a $(OBJDIR)paljtokern.aout.o $(OBJDIR)paljtokern.strip + $(EB_TOOLBOX)/strip2array $(OBJDIR)paljtokern.strip $(OBJDIR)paljtokern.c + $(CC) $(CCFLAGS) -o $(OBJDIR)paljtokern.o -c $(INCLUDES) $(OBJDIR)paljtokern.c + +paljtoslave.o: $(SOURCEDIR)paljtoslave.s + rm $(OBJDIR)paljtoslave.i + cpp -I$(PALCODE) $(SOURCEDIR)paljtoslave.s $(OBJDIR)paljtoslave.i + $(EB_TOOLBOX)/gas -21164 -o $(OBJDIR)paljtoslave.aout.o $(OBJDIR)paljtoslave.i + $(EB_TOOLBOX)/astrip -a $(OBJDIR)paljtoslave.aout.o $(OBJDIR)paljtoslave.strip + $(EB_TOOLBOX)/strip2array $(OBJDIR)paljtoslave.strip $(OBJDIR)paljtoslave.tmp + sed -e 's/palJToKern/palJToSlave/' $(OBJDIR)paljtoslave.tmp >$(OBJDIR)paljtoslave.c + $(CC) $(CCFLAGS) -o $(OBJDIR)paljtoslave.o -c $(INCLUDES) $(OBJDIR)paljtoslave.c + +console: console.o dbmentry.o printf.o paljtokern.o paljtoslave.o + $(LD) -o console -N -T $(DBMENTRY) -non_shared dbmentry.o console.o \ + printf.o paljtokern.o paljtoslave.o -lc + +clean: + rm *.o; rm console; rm *.strip; rm paljtokern.c paljtoslave.c; touch paljtokern.i paljtoslave.i diff -r 9c245e375e05 -r 60051d2262c2 system/alpha/console/console.c --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/system/alpha/console/console.c Fri Nov 14 10:52:42 2003 -0500 @@ -0,0 +1,1126 @@ + + +/* ****************************************** + * SimOS SRM Console + * + * Derived from Lance Berc's SRM console + * for the SRC XXMÂ Machine + * ******************************************/ + + +/* from simos */ +typedef unsigned long long uint64; +#include "machine_defs.h" +#include "new_aouthdr.h" +#include "alpha_access.h" +#if 0 +#include "srcmax.h" +#endif + +/* from ../h */ +#include "lib.h" +#include "rpb.h" +#include "cserve.h" + + +#define CONS_INT_TX 0x01 /* interrupt enable / state bits */ +#define CONS_INT_RX 0x02 + +#define KSEG 0xfffffc0000000000 +#define K1BASE 0xfffffc8000000000 +#define KSEG_TO_PHYS(x)(((ul)x) & ~KSEG) + +#define CDR ((volatile DevConsoleRegisters *) \ + (__MAGIC_ZONE(0, 0, MAGIC_ZONE_BDOOR_DEV) + __MAGIC_BDOOR_CNSLE_OFFS)) + + +#define PHYS_TO_K1(_x) (K1BASE|(_x)) + +#define AOUT_LOAD_ADDR (KSEG|0xf000) + +#define ROUNDUP8(x) ((ul)(((ul)x)+7) & ~7) +#define ROUNDUP128(x) ((ul)(((ul)x)+127) & ~127) +#define ROUNDUP8K(x) ((ul)(((ul)(x))+8191) & ~8191) + +#define FIRST(x) ((((ul)(x)) >> 33) & 0x3ff) +#define SECOND(x) ((((ul)(x)) >> 23) & 0x3ff) +#define THIRD(x) ((((ul)(x)) >> 13) & 0x3ff) +#define THIRD_XXX(x) ((((ul)(x)) >> 13) & 0xfff) +#define PFN(x) ((((ul)(x) & ~KSEG) >> 13)) + +/* Kernel write | kernel read | valid */ +#define KPTE(x) ((ul)((((ul)(x)) << 32) | 0x1101)) + +#define HWRPB_PAGES 4 +#define MDT_BITMAP_PAGES 4 + +#define CSERVE_K_JTOKERN 0x18 + +#define NUM_KERNEL_THIRD (4) + + +static unixBoot(int go, int argc, char **argv); +void jToPal(ul bootadr); +void SlaveLoop(int cpu); + + +AlphaAccess simosConf; + +/* ************************************************************** + * Console callbacks use VMS calling conventions + * read AXP manual, 2-64. + * ***************************************************************/ +typedef struct OpenVMSFunc { + long dummy; + long func; +}OpenVMSFunc; + +OpenVMSFunc callbackFunc, fixupFunc; + + + + +ul theLock; + + +extern void SpinLock(ul *lock); +#define SpinUnlock(_x) *(_x) = 0; + +struct _kernel_params { + char *bootadr; + ul rpb_percpu; + ul free_pfn; + ul argc; + ul argv; + ul envp; /* NULL */ +}; + + +extern consoleCallback[]; +extern consoleFixup[]; +long CallBackDispatcher(); +long CallBackFixup(); + +/* + * simos console output + */ + +void InitConsole(void) +{ +#if 0 + CDR->intr_status =(DevRegister)(DEV_CNSLE_RX_INTR |DEV_CNSLE_TX_INTR); +#endif +} + +void PutChar(char c) +{ +#if 0 + CDR->data = c; +#endif +#if 0 + *(int*) PHYS_TO_K1(SLOT_D_COM1<<5) = c; +#endif + AlphaAccess *k1Conf = (AlphaAccess *)(__MAGIC_ZONE(0, 0, MAGIC_ZONE_EV5_ALIAS)); + k1Conf->outputChar = c; + +} + + +int passArgs(int argc) +{ + ; +} + + +main(int argc, char **argv) +{ + int x,i; + AlphaAccess *k1Conf = (AlphaAccess *)(__MAGIC_ZONE(0, 0, MAGIC_ZONE_EV5_ALIAS)); + ui *k1ptr,*ksegptr; + + + InitConsole(); + printf("SimOS console \n"); + /* + * get configuration from backdoor + */ + simosConf.last_offset = k1Conf->last_offset; + printf(" Got simosConfiguration %d \n",simosConf.last_offset); + + for (i=1;i<=simosConf.last_offset/4;i++) { + ui *k1ptr = (ui*)k1Conf + i; + ui *ksegptr = (ui*)(&simosConf.last_offset)+i; + *ksegptr = *k1ptr; + + } + + if (simosConf.version != ALPHA_ACCESS_VERSION) { + panic("Console version mismatch. Console expects %d. SimOS has %d \n", + ALPHA_ACCESS_VERSION,simosConf.version); + } + + + /* + * setup arguments to kernel + */ + unixBoot(1,argc,argv); + + x = *(volatile int *)(K1BASE-4); + while(1) continue; + return x; +} + +/* + * BOOTING + */ +struct rpb xxm_rpb = { + NULL, /* 000: physical self-reference */ + 'H'|('W'<<8)|('R'<<16)|('P'<<24)|('B'<<32), /* 008: contains string "HWRPB" */ + 6, /* 010: HWRPB version number */ + /* the byte count is wrong, but who needs it? - lance */ + 0, /* 018: bytes in RPB perCPU CTB CRB MEDSC */ + 0, /* 020: primary cpu id */ + 8192, /* 028: page size in bytes */ + 43, /* 030: number of phys addr bits */ + 127, /* 038: max valid ASN */ + {'0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '0', '1'}, /* 040: system serial num: 10 ascii chars */ +#ifdef undef +/* To be legitimate, the following system type and variation are correct for the XXM. + But there are too many #ifdefs etc to deal with in Unix, so we tell the kernel + that we're an Avanti, which is similar enough. + */ + 31, /* 050: system type - XXM is now in the Alpha SRM */ + (1 << 10) | (2<<1),/* 058: system variation - XXM w/EV5 & embeded console */ +#endif +#if 0 + 0x12, /* 050: system type - masquarade as some random 21064 */ +#endif + 12, /* masquerade a DEC_3000_500 (bugnion) */ + (2<<1), /* 058: system variation */ + 'c'|('o'<<8)|('o'<<16)|('l'<< 24), /* 060: system revision */ + 1024*4096, /* 068: scaled interval clock intr freq OVERRIDEN*/ + 0, /* 070: cycle counter frequency */ + 0x200000000, /* 078: virtual page table base */ + 0, /* 080: reserved */ + 0, /* 088: offset to translation buffer hint */ + 1, /* 090: number of processor slots OVERRIDDEN*/ + sizeof(struct rpb_percpu), /* 098: per-cpu slot size. OVERRIDDEN */ + 0, /* 0A0: offset to per_cpu slots */ + 1, /* 0A8: number of CTBs */ +#ifdef bugnion_gone + sizeof(struct rpb_ctb), /* 0B0: bytes in largest CTB */ +#else + sizeof(struct ctb_tt), +#endif + 0, /* 0B8: offset to CTB (cons term block) */ + 0, /* 0C0: offset to CRB (cons routine block) */ + 0, /* 0C8: offset to memory descriptor table */ + 0, /* 0D0: offset to config data block */ + 0, /* 0D8: offset to FRU table */ + 0, /* 0E0: virt addr of save term routine */ + 0, /* 0E8: proc value for save term routine */ + 0, /* 0F0: virt addr of restore term routine */ + 0, /* 0F8: proc value for restore term routine */ + 0, /* 100: virt addr of CPU restart routine */ + 0, /* 108: proc value for CPU restart routine */ + 0, /* 110: used to determine presence of kdebug */ + 0, /* 118: reserved for hardware */ +/* the checksum is wrong, but who needs it? - lance */ + 0, /* 120: checksum of prior entries in rpb */ + 0, /* 128: receive ready bitmask */ + 0, /* 130: transmit ready bitmask */ + 0, /* 138: Dynamic System Recog. offset */ +}; + +ul xxm_tbb[] = { 0x1e1e1e1e1e1e1e1e, 0x1e1e1e1e1e1e1e1e, 0x1e1e1e1e1e1e1e1e, 0x1e1e1e1e1e1e1e1e, + 0x1e1e1e1e1e1e1e1e, 0x1e1e1e1e1e1e1e1e, 0x1e1e1e1e1e1e1e1e, 0x1e1e1e1e1e1e1e1e}; + +struct rpb_percpu xxm_rpb_percpu = { + {0,0,0,0,0,0,0,{0,0},{0,0,0,0,0,0,0,0}}, /* 000: boot/restart HWPCB */ + (STATE_PA | STATE_PP | STATE_CV | STATE_PV | STATE_PMV | STATE_PL), /* 080: per-cpu state bits */ + 0xc000, /* 088: palcode memory length */ + 0x2000, /* 090: palcode scratch length */ + 0x4000, /* 098: phys addr of palcode mem space */ + 0x2000, /* 0A0: phys addr of palcode scratch space */ + (2 << 16) | (5 << 8) | 1, /* 0A8: PALcode rev required */ + 5|(2<<32), /* 0B0: processor type */ + 7, /* 0B8: processor variation */ + 'D'|('a'<<8)|('v'<<16)|('e'<<24), /* 0C0: processor revision */ _______________________________________________ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev