changeset 8fe2d7ff1111 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=8fe2d7ff1111
description:
        configs: set default cache params
        It's confusing (especially to new users), when you are setting some 
standard
        parameters (as defined in Options.py) and they aren't reflected in the 
simulations
        so we might as well link the settings in CacheConfig.py to those in 
Options.py

diffstat:

 configs/common/CacheConfig.py |  10 +++++-----
 configs/common/Options.py     |   4 ++--
 2 files changed, 7 insertions(+), 7 deletions(-)

diffs (50 lines):

diff -r e1fd27c723a2 -r 8fe2d7ff1111 configs/common/CacheConfig.py
--- a/configs/common/CacheConfig.py     Wed Feb 23 00:58:42 2011 -0500
+++ b/configs/common/CacheConfig.py     Wed Feb 23 01:01:46 2011 -0500
@@ -35,7 +35,7 @@
 
 def config_cache(options, system):
     if options.l2cache:
-        system.l2 = L2Cache(size='2MB')
+        system.l2 = L2Cache(size = options.l2_size, assoc = options.l2_assoc)
         system.tol2bus = Bus()
         system.l2.cpu_side = system.tol2bus.port
         system.l2.mem_side = system.membus.port
@@ -43,14 +43,14 @@
 
     for i in xrange(options.num_cpus):
         if options.caches:
+            icache = L1Cache(size = options.l1i_size, assoc = 
options.l1i_assoc)
+            dcache = L1Cache(size = options.l1d_size, assoc = 
options.l1d_assoc)
             if buildEnv['TARGET_ISA'] == 'x86':
-                system.cpu[i].addPrivateSplitL1Caches(L1Cache(size = '32kB'),
-                                                      L1Cache(size = '64kB'),
+                system.cpu[i].addPrivateSplitL1Caches(icache, dcache,
                                                       PageTableWalkerCache(),
                                                       PageTableWalkerCache())
             else:
-                system.cpu[i].addPrivateSplitL1Caches(L1Cache(size = '32kB'),
-                                                      L1Cache(size = '64kB'))
+                system.cpu[i].addPrivateSplitL1Caches(icache, dcache)
         if options.l2cache:
             system.cpu[i].connectAllPorts(system.tol2bus, system.membus)
         else:
diff -r e1fd27c723a2 -r 8fe2d7ff1111 configs/common/Options.py
--- a/configs/common/Options.py Wed Feb 23 00:58:42 2011 -0500
+++ b/configs/common/Options.py Wed Feb 23 01:01:46 2011 -0500
@@ -38,13 +38,13 @@
 parser.add_option("--num-dirs", type="int", default=1)
 parser.add_option("--num-l2caches", type="int", default=1)
 parser.add_option("--num-l3caches", type="int", default=1)
-parser.add_option("--l1d_size", type="string", default="32kB")
+parser.add_option("--l1d_size", type="string", default="64kB")
 parser.add_option("--l1i_size", type="string", default="32kB")
 parser.add_option("--l2_size", type="string", default="2MB")
 parser.add_option("--l3_size", type="string", default="16MB")
 parser.add_option("--l1d_assoc", type="int", default=2)
 parser.add_option("--l1i_assoc", type="int", default=2)
-parser.add_option("--l2_assoc", type="int", default=16)
+parser.add_option("--l2_assoc", type="int", default=8)
 parser.add_option("--l3_assoc", type="int", default=16)
 
 # Run duration options
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