changeset 5c7c804e0645 in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=5c7c804e0645 description: Statetrace: Accomodate cross compiling statetrace with scons.
diffstat: util/statetrace/SConscript | 39 ++ util/statetrace/SConstruct | 43 ++- util/statetrace/arch/amd64/tracechild.cc | 404 ++++++++++++++++++++++++++ util/statetrace/arch/amd64/tracechild.hh | 118 +++++++ util/statetrace/arch/arm/tracechild.cc | 254 ++++++++++++++++ util/statetrace/arch/arm/tracechild.hh | 107 +++++++ util/statetrace/arch/i386/tracechild.cc | 104 ++++++ util/statetrace/arch/i386/tracechild.hh | 85 +++++ util/statetrace/arch/sparc/tracechild.cc | 472 +++++++++++++++++++++++++++++++ util/statetrace/arch/sparc/tracechild.hh | 114 +++++++ util/statetrace/arch/tracechild_amd64.cc | 404 -------------------------- util/statetrace/arch/tracechild_amd64.hh | 118 ------- util/statetrace/arch/tracechild_arm.cc | 254 ---------------- util/statetrace/arch/tracechild_arm.hh | 107 ------- util/statetrace/arch/tracechild_i386.cc | 104 ------ util/statetrace/arch/tracechild_i386.hh | 85 ----- util/statetrace/arch/tracechild_sparc.cc | 472 ------------------------------- util/statetrace/arch/tracechild_sparc.hh | 114 ------- util/statetrace/base/arch_check.h | 78 +++++ util/statetrace/base/regstate.hh | 46 +++ util/statetrace/base/statetrace.cc | 156 ++++++++++ util/statetrace/base/tracechild.cc | 147 +++++++++ util/statetrace/base/tracechild.hh | 62 ++++ util/statetrace/regstate.hh | 46 --- util/statetrace/statetrace.cc | 154 ---------- util/statetrace/tracechild.cc | 147 --------- util/statetrace/tracechild.hh | 62 ---- util/statetrace/tracechild_arch.cc | 56 --- 28 files changed, 2225 insertions(+), 2127 deletions(-) diffs (truncated from 4467 to 300 lines): diff -r 70fffada3270 -r 5c7c804e0645 util/statetrace/SConscript --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/util/statetrace/SConscript Wed Mar 02 22:53:11 2011 -0800 @@ -0,0 +1,39 @@ +# Copyright (c) 2011 Gabe Black +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer; +# redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution; +# neither the name of the copyright holders nor the names of its +# contributors may be used to endorse or promote products derived from +# this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +# Authors: Gabe Black + +import os + +Import('env', 'arch') + +env.Append(CPPPATH=Dir('.')) + +sources = [os.path.join('base', 'statetrace.cc'), + os.path.join('base', 'tracechild.cc'), + os.path.join('arch', arch, 'tracechild.cc')] +objects = [env.Object(source) for source in sources] +env.Program('statetrace', objects) diff -r 70fffada3270 -r 5c7c804e0645 util/statetrace/SConstruct --- a/util/statetrace/SConstruct Wed Mar 02 22:53:11 2011 -0800 +++ b/util/statetrace/SConstruct Wed Mar 02 22:53:11 2011 -0800 @@ -26,7 +26,42 @@ # # Authors: Gabe Black -sources = ['statetrace.cc', 'tracechild.cc', 'tracechild_arch.cc'] -cxx_flags = "-O3 -ggdb -I ./ -I ./arch" -objects = [Object(source, CXXFLAGS=cxx_flags) for source in sources] -Program('statetrace', objects) +Help(''' +To build a version of statetrace suitable to run on a particular ISA, use a +target of the form build/<arch>/statetrace. For example, to build statetrace +for ARM binaries, run: + +scons build/arm/statetrace + +You may need a cross compiler in order to build statetrace successfully. To +specify an alternative compiler, set the CXX scons argument on the command +line. The CXX environment variable is NOT considered when selecting the +compiler. To override the compiler for a particular target ISA, set the +<arch>CXX scons argument. For example, to build both the AMD64 version and +the ARM version at the same time using the system compiler for the AMD64 +version and a cross compiler for arm, your command line would look like the +following: + +scons ARMCXX=arm-cross-g++ build/amd64/statetrace build/arm/statetrace + +After a successful build, the statetrace binary(binaries) will be located in +the build/<arch>/ directories you specified on the command line. +''') + + +arches = 'amd64', 'arm', 'i386', 'sparc' + +import os + +main = Environment() +main.SetOption('duplicate', 'soft-copy') +main['CXXFLAGS'] = "-O3 -ggdb $_CPPINCFLAGS" + +main['CXX'] = ARGUMENTS.get('CXX', main['CXX']) + +for arch in arches: + env = main.Clone() + env['CXX'] = ARGUMENTS.get(arch.upper() + 'CXX', env['CXX']) + env.Append(CPPFLAGS = '-D__STATETRACE_%s__' % arch.upper()) + Export('env', 'arch') + env.SConscript('SConscript', variant_dir = os.path.join('build', arch)) diff -r 70fffada3270 -r 5c7c804e0645 util/statetrace/arch/amd64/tracechild.cc --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/util/statetrace/arch/amd64/tracechild.cc Wed Mar 02 22:53:11 2011 -0800 @@ -0,0 +1,404 @@ +/* + * Copyright (c) 2007 The Regents of The University of Michigan + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Gabe Black + */ + +#include <iostream> +#include <iomanip> +#include <errno.h> +#include <sys/ptrace.h> +#include <stdint.h> +#include <string.h> + +#include "arch/amd64/tracechild.hh" + +using namespace std; + +bool +AMD64TraceChild::sendState(int socket) +{ + uint64_t regVal64 = 0; + uint32_t regVal32 = 0; + for (int x = 0; x <= R15; x++) { + regVal64 = getRegVal(x); + if (write(socket, ®Val64, sizeof(regVal64)) == -1) { + cerr << "Write failed! " << strerror(errno) << endl; + tracing = false; + return false; + } + } + regVal64 = getRegVal(RIP); + if (write(socket, ®Val64, sizeof(regVal64)) == -1) { + cerr << "Write failed! " << strerror(errno) << endl; + tracing = false; + return false; + } + for (int x = MMX0_0; x <= MMX7_1; x++) { + regVal32 = getRegVal(x); + if (write(socket, ®Val32, sizeof(regVal32)) == -1) { + cerr << "Write failed! " << strerror(errno) << endl; + tracing = false; + return false; + } + } + for (int x = XMM0_0; x <= XMM15_3; x++) { + regVal32 = getRegVal(x); + if (write(socket, ®Val32, sizeof(regVal32)) == -1) { + cerr << "Write failed! " << strerror(errno) << endl; + tracing = false; + return false; + } + } + return true; +} + +int64_t +AMD64TraceChild::getRegs(user_regs_struct & myregs, + user_fpregs_struct & myfpregs, int num) +{ + assert(num < numregs && num >= 0); + switch (num) { + //GPRs + case RAX: return myregs.rax; + case RBX: return myregs.rbx; + case RCX: return myregs.rcx; + case RDX: return myregs.rdx; + //Index registers + case RSI: return myregs.rsi; + case RDI: return myregs.rdi; + //Base pointer and stack pointer + case RBP: return myregs.rbp; + case RSP: return myregs.rsp; + //New 64 bit mode registers + case R8: return myregs.r8; + case R9: return myregs.r9; + case R10: return myregs.r10; + case R11: return myregs.r11; + case R12: return myregs.r12; + case R13: return myregs.r13; + case R14: return myregs.r14; + case R15: return myregs.r15; + //Segmentation registers + case CS: return myregs.cs; + case DS: return myregs.ds; + case ES: return myregs.es; + case FS: return myregs.fs; + case GS: return myregs.gs; + case SS: return myregs.ss; + case FS_BASE: return myregs.fs_base; + case GS_BASE: return myregs.gs_base; + //PC + case RIP: return myregs.rip; + //Flags + case EFLAGS: return myregs.eflags; + //MMX + case MMX0_0: return myfpregs.st_space[0]; + case MMX0_1: return myfpregs.st_space[1]; + case MMX1_0: return myfpregs.st_space[2]; + case MMX1_1: return myfpregs.st_space[3]; + case MMX2_0: return myfpregs.st_space[4]; + case MMX2_1: return myfpregs.st_space[5]; + case MMX3_0: return myfpregs.st_space[6]; + case MMX3_1: return myfpregs.st_space[7]; + case MMX4_0: return myfpregs.st_space[8]; + case MMX4_1: return myfpregs.st_space[9]; + case MMX5_0: return myfpregs.st_space[10]; + case MMX5_1: return myfpregs.st_space[11]; + case MMX6_0: return myfpregs.st_space[12]; + case MMX6_1: return myfpregs.st_space[13]; + case MMX7_0: return myfpregs.st_space[14]; + case MMX7_1: return myfpregs.st_space[15]; + //XMM + case XMM0_0: return myfpregs.xmm_space[0]; + case XMM0_1: return myfpregs.xmm_space[1]; + case XMM0_2: return myfpregs.xmm_space[2]; + case XMM0_3: return myfpregs.xmm_space[3]; + case XMM1_0: return myfpregs.xmm_space[4]; + case XMM1_1: return myfpregs.xmm_space[5]; + case XMM1_2: return myfpregs.xmm_space[6]; + case XMM1_3: return myfpregs.xmm_space[7]; + case XMM2_0: return myfpregs.xmm_space[8]; + case XMM2_1: return myfpregs.xmm_space[9]; + case XMM2_2: return myfpregs.xmm_space[10]; + case XMM2_3: return myfpregs.xmm_space[11]; + case XMM3_0: return myfpregs.xmm_space[12]; + case XMM3_1: return myfpregs.xmm_space[13]; + case XMM3_2: return myfpregs.xmm_space[14]; + case XMM3_3: return myfpregs.xmm_space[15]; + case XMM4_0: return myfpregs.xmm_space[16]; + case XMM4_1: return myfpregs.xmm_space[17]; + case XMM4_2: return myfpregs.xmm_space[18]; + case XMM4_3: return myfpregs.xmm_space[19]; + case XMM5_0: return myfpregs.xmm_space[20]; + case XMM5_1: return myfpregs.xmm_space[21]; + case XMM5_2: return myfpregs.xmm_space[22]; + case XMM5_3: return myfpregs.xmm_space[23]; + case XMM6_0: return myfpregs.xmm_space[24]; + case XMM6_1: return myfpregs.xmm_space[25]; + case XMM6_2: return myfpregs.xmm_space[26]; + case XMM6_3: return myfpregs.xmm_space[27]; + case XMM7_0: return myfpregs.xmm_space[28]; + case XMM7_1: return myfpregs.xmm_space[29]; + case XMM7_2: return myfpregs.xmm_space[30]; + case XMM7_3: return myfpregs.xmm_space[31]; + case XMM8_0: return myfpregs.xmm_space[32]; + case XMM8_1: return myfpregs.xmm_space[33]; + case XMM8_2: return myfpregs.xmm_space[34]; + case XMM8_3: return myfpregs.xmm_space[35]; + case XMM9_0: return myfpregs.xmm_space[36]; + case XMM9_1: return myfpregs.xmm_space[37]; + case XMM9_2: return myfpregs.xmm_space[38]; + case XMM9_3: return myfpregs.xmm_space[39]; + case XMM10_0: return myfpregs.xmm_space[40]; + case XMM10_1: return myfpregs.xmm_space[41]; + case XMM10_2: return myfpregs.xmm_space[42]; + case XMM10_3: return myfpregs.xmm_space[43]; + case XMM11_0: return myfpregs.xmm_space[44]; + case XMM11_1: return myfpregs.xmm_space[45]; + case XMM11_2: return myfpregs.xmm_space[46]; + case XMM11_3: return myfpregs.xmm_space[47]; + case XMM12_0: return myfpregs.xmm_space[48]; + case XMM12_1: return myfpregs.xmm_space[49]; + case XMM12_2: return myfpregs.xmm_space[50]; + case XMM12_3: return myfpregs.xmm_space[51]; + case XMM13_0: return myfpregs.xmm_space[52]; + case XMM13_1: return myfpregs.xmm_space[53]; + case XMM13_2: return myfpregs.xmm_space[54]; + case XMM13_3: return myfpregs.xmm_space[55]; + case XMM14_0: return myfpregs.xmm_space[56]; + case XMM14_1: return myfpregs.xmm_space[57]; + case XMM14_2: return myfpregs.xmm_space[58]; + case XMM14_3: return myfpregs.xmm_space[59]; + case XMM15_0: return myfpregs.xmm_space[60]; + case XMM15_1: return myfpregs.xmm_space[61]; + case XMM15_2: return myfpregs.xmm_space[62]; + case XMM15_3: return myfpregs.xmm_space[63]; + default: + assert(0); + return 0; _______________________________________________ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev