changeset b0ecadb07742 in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=b0ecadb07742 description: Ruby: minor bugfix, line did not adhere to some macro usage conventions.
diffstat: src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diffs (12 lines): diff -r 03f7df749b9d -r b0ecadb07742 src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh --- a/src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh Thu Mar 17 17:01:41 2011 -0700 +++ b/src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh Thu Mar 17 17:08:35 2011 -0700 @@ -125,7 +125,7 @@ inline NodeID L1CacheMachIDToProcessorNum(MachineID machID) { - assert(machID.type == MachineType_L1Cache); + assert(machID.type == MACHINETYPE_L1CACHE_ENUM); return machID.num; } _______________________________________________ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev