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src/arch/isa_parser.py <http://reviews.m5sim.org/r/587/#comment1354> Hi Gabe, not to be nitpicky but what are you trying to accomplish with this change? I have no objection to it, I'm just trying to understand how this applies to a particular line of code in defining an instruction. Is there a short example you can provide that demonstrates what kind of ISA-description you will be able to use with this? - Korey On 2011-03-17 14:51:31, Gabe Black wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.m5sim.org/r/587/ > ----------------------------------------------------------- > > (Updated 2011-03-17 14:51:31) > > > Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and > Nathan Binkert. > > > Summary > ------- > > ISA parser: Set up op_src_decl and op_dest_decl for pc operands. > > > Diffs > ----- > > src/arch/isa_parser.py 5138d1e453f1 > > Diff: http://reviews.m5sim.org/r/587/diff > > > Testing > ------- > > > Thanks, > > Gabe > > _______________________________________________ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
