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Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and Nathan Binkert. Summary ------- ARM: Cleanup implementation of ITSTATE and put important code in PCState. Consolidate all code to handle ITSTATE in the PCState object rather than touching a variety of structures/objects. Diffs ----- src/arch/alpha/predecoder.hh d54b7775a6b0 src/arch/arm/faults.cc d54b7775a6b0 src/arch/arm/isa.cc d54b7775a6b0 src/arch/arm/isa/insts/data.isa d54b7775a6b0 src/arch/arm/isa/insts/macromem.isa d54b7775a6b0 src/arch/arm/isa/insts/misc.isa d54b7775a6b0 src/arch/arm/isa/operands.isa d54b7775a6b0 src/arch/arm/isa/templates/macromem.isa d54b7775a6b0 src/arch/arm/isa/templates/mem.isa d54b7775a6b0 src/arch/arm/isa/templates/misc.isa d54b7775a6b0 src/arch/arm/isa/templates/neon.isa d54b7775a6b0 src/arch/arm/isa/templates/pred.isa d54b7775a6b0 src/arch/arm/miscregs.hh d54b7775a6b0 src/arch/arm/predecoder.hh d54b7775a6b0 src/arch/arm/predecoder.cc d54b7775a6b0 src/arch/arm/types.hh d54b7775a6b0 src/arch/mips/predecoder.hh d54b7775a6b0 src/arch/power/predecoder.hh d54b7775a6b0 src/arch/sparc/predecoder.hh d54b7775a6b0 src/arch/x86/predecoder.hh d54b7775a6b0 src/cpu/o3/fetch_impl.hh d54b7775a6b0 Diff: http://reviews.m5sim.org/r/616/diff Testing ------- Thanks, Ali _______________________________________________ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
