changeset a8c4b7a24d62 in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=a8c4b7a24d62 description: ARM: Add support for some more registers in the real view controller.
diffstat: src/dev/arm/rv_ctrl.cc | 10 +++++++++- src/dev/arm/rv_ctrl.hh | 7 +++++++ 2 files changed, 16 insertions(+), 1 deletions(-) diffs (63 lines): diff -r 5dddde1126c2 -r a8c4b7a24d62 src/dev/arm/rv_ctrl.cc --- a/src/dev/arm/rv_ctrl.cc Wed May 04 20:38:27 2011 -0500 +++ b/src/dev/arm/rv_ctrl.cc Wed May 04 20:38:27 2011 -0500 @@ -43,7 +43,7 @@ #include "mem/packet_access.hh" RealViewCtrl::RealViewCtrl(Params *p) - : BasicPioDevice(p) + : BasicPioDevice(p), flags(0) { pioSize = 0xD4; } @@ -94,6 +94,9 @@ case Lock: pkt->set<uint32_t>(sysLock); break; + case Flags: + pkt->set<uint32_t>(flags); + break; default: panic("Tried to read RealView I/O at offset %#x that doesn't exist\n", daddr); break; @@ -121,6 +124,9 @@ case Lock: sysLock.lockVal = pkt->get<uint16_t>(); break; + case Flags: + flags = pkt->get<uint32_t>(); + break; default: panic("Tried to write RVIO at offset %#x that doesn't exist\n", daddr); break; @@ -132,11 +138,13 @@ void RealViewCtrl::serialize(std::ostream &os) { + SERIALIZE_SCALAR(flags); } void RealViewCtrl::unserialize(Checkpoint *cp, const std::string §ion) { + UNSERIALIZE_SCALAR(flags); } RealViewCtrl * diff -r 5dddde1126c2 -r a8c4b7a24d62 src/dev/arm/rv_ctrl.hh --- a/src/dev/arm/rv_ctrl.hh Wed May 04 20:38:27 2011 -0500 +++ b/src/dev/arm/rv_ctrl.hh Wed May 04 20:38:27 2011 -0500 @@ -95,6 +95,13 @@ SysLockReg sysLock; + /** This register is used for smp booting. + * The primary cpu writes the secondary start address here before + * sends it a soft interrupt. The secondary cpu reads this register and if + * it's non-zero it jumps to the address + */ + uint32_t flags; + public: typedef RealViewCtrlParams Params; const Params * _______________________________________________ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev