changeset 0990d8c19b64 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=0990d8c19b64
description:
network: added Torus and Pt2Pt topologies
diffstat:
src/mem/ruby/network/topologies/Pt2Pt.py | 55 +++++++++++++
src/mem/ruby/network/topologies/SConscript | 3 +-
src/mem/ruby/network/topologies/Torus.py | 122 +++++++++++++++++++++++++++++
3 files changed, 179 insertions(+), 1 deletions(-)
diffs (195 lines):
diff -r a6363c870af6 -r 0990d8c19b64 src/mem/ruby/network/topologies/Pt2Pt.py
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/src/mem/ruby/network/topologies/Pt2Pt.py Sat May 07 17:28:15 2011 -0400
@@ -0,0 +1,55 @@
+# Copyright (c) 2011 Advanced Micro Devices, Inc.
+# 2011 Massachusetts Institute of Technology
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Brad Beckmann
+# Tushar Krishna
+
+from m5.params import *
+from m5.objects import *
+
+class Pt2Pt(Topology):
+ description='Pt2Pt'
+
+def makeTopology(nodes, options, IntLink, ExtLink, Router):
+ # Create an individual router for each controller, and connect all to all.
+ routers = [Router(router_id=i) for i in range(len(nodes))]
+ ext_links = [ExtLink(link_id=i, ext_node=n, int_node=routers[i])
+ for (i, n) in enumerate(nodes)]
+ link_count = len(nodes)
+
+ int_links = []
+ for i in xrange(len(nodes)):
+ for j in xrange(len(nodes)):
+ if (i != j):
+ link_count += 1
+ int_links.append(IntLink(link_id=link_count,
+ node_a=routers[i],
+ node_b=routers[j]))
+
+ return Pt2Pt(ext_links=ext_links,
+ int_links=int_links,
+ routers=routers)
diff -r a6363c870af6 -r 0990d8c19b64 src/mem/ruby/network/topologies/SConscript
--- a/src/mem/ruby/network/topologies/SConscript Sat May 07 07:38:36
2011 -0500
+++ b/src/mem/ruby/network/topologies/SConscript Sat May 07 17:28:15
2011 -0400
@@ -36,4 +36,5 @@
PySource('', 'Crossbar.py')
PySource('', 'Mesh.py')
PySource('', 'MeshDirCorners.py')
-
+PySource('', 'Pt2Pt.py')
+PySource('', 'Torus.py')
diff -r a6363c870af6 -r 0990d8c19b64 src/mem/ruby/network/topologies/Torus.py
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/src/mem/ruby/network/topologies/Torus.py Sat May 07 17:28:15 2011 -0400
@@ -0,0 +1,122 @@
+# Copyright (c) 2011 Advanced Micro Devices, Inc.
+# 2011 Massachusetts Institute of Technology
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Brad Beckmann
+# Tushar Krishna
+
+from m5.params import *
+from m5.objects import *
+
+class Torus(Topology):
+ description='Torus'
+
+# Makes a generic torus assuming an equal number of cache and directory cntrls
+# Assuming a folded-torus on-chip layout (as shown on gem5 wiki).
+# All links (including the wrap-around ones) are of equal length, double that
+# of a mesh. Thus, each link is assigned a latency of 2 cycles.
+
+def makeTopology(nodes, options, IntLink, ExtLink, Router):
+
+ num_routers = options.num_cpus
+ num_rows = options.mesh_rows
+
+ # There must be an evenly divisible number of cntrls to routers
+ # Also, obviously the number or rows must be <= the number of routers
+ cntrls_per_router, remainder = divmod(len(nodes), num_routers)
+ assert(num_rows <= num_routers)
+ num_columns = int(num_routers / num_rows)
+ assert(num_columns * num_rows == num_routers)
+
+ # Create the routers in the torus
+ routers = [Router(router_id=i) for i in range(num_routers)]
+
+ # link counter to set unique link ids
+ link_count = 0
+
+ # Add all but the remainder nodes to the list of nodes to be uniformly
+ # distributed across the network.
+ network_nodes = []
+ remainder_nodes = []
+ for node_index in xrange(len(nodes)):
+ if node_index < (len(nodes) - remainder):
+ network_nodes.append(nodes[node_index])
+ else:
+ remainder_nodes.append(nodes[node_index])
+
+ # Connect each node to the appropriate router
+ ext_links = []
+ for (i, n) in enumerate(network_nodes):
+ cntrl_level, router_id = divmod(i, num_routers)
+ assert(cntrl_level < cntrls_per_router)
+ ext_links.append(ExtLink(link_id=link_count, ext_node=n,
+ int_node=routers[router_id]))
+ link_count += 1
+
+ # Connect the remainding nodes to router 0. These should only be
+ # DMA nodes.
+ for (i, node) in enumerate(remainder_nodes):
+ assert(node.type == 'DMA_Controller')
+ assert(i < remainder)
+ ext_links.append(ExtLink(link_id=link_count, ext_node=node,
+ int_node=routers[0]))
+ link_count += 1
+
+ # Create the torus links. First row (east-west) links then column
+ # (north-south) links
+ # column links are given higher weights to implement XY routing
+ int_links = []
+ for row in xrange(num_rows):
+ for col in xrange(num_columns):
+ west_id = col + (row * num_columns)
+ if (col + 1 < num_columns):
+ east_id = (col + 1) + (row * num_columns)
+ else:
+ east_id = (row * num_columns)
+ int_links.append(IntLink(link_id=link_count,
+ node_a=routers[east_id],
+ node_b=routers[west_id],
+ latency=2,
+ weight=1))
+ link_count += 1
+
+ for col in xrange(num_columns):
+ for row in xrange(num_rows):
+ north_id = col + (row * num_columns)
+ if (row + 1 < num_rows):
+ south_id = col + ((row + 1) * num_columns)
+ else:
+ south_id = col
+ int_links.append(IntLink(link_id=link_count,
+ node_a=routers[north_id],
+ node_b=routers[south_id],
+ latency=2,
+ weight=2))
+ link_count += 1
+
+ return Torus(ext_links=ext_links,
+ int_links=int_links,
+ routers=routers)
_______________________________________________
m5-dev mailing list
m5-dev@m5sim.org
http://m5sim.org/mailman/listinfo/m5-dev
