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Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and Nathan Binkert. Summary ------- alpha: make hwrei a control inst this always changes the PC and is basically an impromptu branch instruction. why not speculate on this instead of always be forced to mispredict/squash after the hwrei gets resolved? The InOrder model needs this marked as "isControl" so it knows to update the PC after the ALU executes it. If this isnt marked as control, then it's going to force the model to check the PC of every instruction at commit (what O3 does?), and that would be a wasteful check for a very high percentage of instructions. Diffs ----- src/arch/alpha/isa/decoder.isa 77d12d8f7971 Diff: http://reviews.m5sim.org/r/740/diff Testing ------- Thanks, Korey _______________________________________________ gem5-dev mailing list gem5-dev@m5sim.org http://m5sim.org/mailman/listinfo/gem5-dev
