The size of the immediate pulled in by IMMEDIATE is always the same since it's the uint64_t "immediate" field of the x86 ExtMachInst. The predecoder decides how to fill it, and it uses the tables in src/arch/x86/predecoder_tables.cc for that. You have to use a particular size for all instructions with the same main opcode bytes (aka it can't change based on opcode extensions). Thankfully x86 -almost- follows this rule, and the one exception I'm aware of is hardcoded into the predecoder. Assuming you're grabbing a top level opcode and not doing anything tricky, you should be able to just adjust the ImmediateType table and get what you want. Some of the immediate types change size based on the effective operand size, I believe, but there are also ones that are fixed. That's determined by the SizeTypeToSize table.
Gabe On 06/21/11 15:10, Gabriel Michael Black wrote: > I'll have to look through the code again, but you should be able to do > that. I don't have time to look at it right now, but I'll try to > sometime soon. > > Gabe > > Quoting nathan binkert <[email protected]>: > >> You'll have to find out from Gabe :) Hopefully he's reading. >> >> Nate >> >>> The current implementation of the pseudo instructions make use of the >>> immediate value to figure out which pseudo instruction to execute. This >>> means that I cannot make use of the same opcode. So, I have to add a >>> new >>> one. I have made the following additions to two_byte_opcodes.isa file. >>> >>> + 0x0E: decode OPCODE_OP_TOP5 { >>> + 0x00: decode OPCODE_OP_BOTTOM3 { >>> + format BasicOperate { >>> + 0x4: newinst({{ >>> + PseudoInst::dosomethingnew(xc->tcBase(), >>> IMMEDIATE); >>> + }}, IsNonSpeculative); >>> + default: M5InternalError::error( >>> + {{"Unexpected instruction opcode!"}}); >>> + } >>> + } >>> + } >>> >>> This compiles, but I am not sure of the width of the IMMEDIATE field >>> in this >>> case. How can I ensure that the immediate field has a length, say, >>> 32-bits. >>> >>> -- >>> Nilay >>> _______________________________________________ >>> gem5-users mailing list >>> [email protected] >>> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >>> >> _______________________________________________ >> gem5-users mailing list >> [email protected] >> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >> > > > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users _______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
