Hi guys, I came across a lot of panics "Inconsistent DMA transfer state: dmaState = 2, devState = 0 (or 1)" in the simulation. I digged into src/dev/ide_disk.cc that is the only .cc file where the two variables "dmaState" show up.
If I understand the finite state machine correctly, devState is in state"2/Transfer_Data_Dma" if and only if dmaState is in state "2/Dma_Transfer". However, I found there are cases in which the equivalence rule can be violated: Assume that right now we have "dmaState == Dma_Transfer && devState == Transfer_Data_Dma", and further assume that for some reason the function IdeDisk::abortDma() (line 561 of src/dev/ide_disk.cc) is called. Then, abortDma() will invoke the function "updateState(ACT_CMD_Error)". Within the function "updateState()", since "devState" is in state "Transfer_Data_Dma" and "action" is equal to "ACT_CMD_Error" at present, the last case block (line 971 - line 986 of src/dev/ide_disk.cc) is executed, where ONLYdevState is set to other values than "Transfer_Data_Dma". Now, we have "dmaState == Dma_Transfer" and "devState != Transfer_Data_Dma". In the following, if the function "doDmaTransfer()" (line 320 of src/dev/ide_disk.cc) is called, we can have the "Inconsistent DMA transfer state" panic. I think changing "dmaState" to one of other states in the same case block might be a solution, which I am still testing at this moment. But I am not sure if it will bring any side-effects. I would like to get your opinions and suggestions. Thanks, Leonard -- Give our ability to our work, but our genius to our life!
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