On Sat, July 16, 2011 12:48 am, Mahmood Naderan wrote: > Is there any suggestion for the error I get for this command: > build/X86_SE/m5.opt -d results/bzip2/ configs/example/se.py --caches > --l2cache -d --fast-forward=10000 --maxinsts=1000 -s --l2_size 512kB > -n 1 -c > ~/spec-cpu2006-x86_64/benchspec/CPU2006/401.bzip2/exe/bzip2_base.amd64-m64-gcc44-nn > -o > "/home/mahmood/spec-cpu2006-x86_64/benchspec/CPU2006/401.bzip2/exe/liberty.jpg > 30" > > > ... > spec_init > hack: be nice to actually delete the event here > Switched CPUS @ tick 5859500 > Changing memory mode to timing > switching cpus > panic: copyRegs not implemented for x86! > @ cycle 5859500 > [copyRegs:build/X86_SE/arch/x86/utility.cc, line 231] > > Seems that x86 is not complete like alpha. Is there any document that > list which features are/aren't available in x86?
The latest version has copyRegs in it. -- Nilay _______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
