Hi Iordan,
Here is the patch for checkpointing caches. I was working on the current
stable revision 8337:b9ba22cb23f2. This works for Simple Atomic CPU.
-Abhishek
On Wed, Aug 10, 2011 at 9:43 AM, Ali Saidi <[email protected]> wrote:
> I can think of very few reasons why you would want to have caches in a
> checkpoint. You can add them when you restore from the checkpoint.
>
> Ali
>
> Sent from my ARM powered device
>
> On Aug 10, 2011, at 2:56 AM, Iordan Alexandru <[email protected]> wrote:
>
> Hello
>
> Thank you for your reply.
>
> Is there no way to get a valid checkpoint in a simulation with caches
> enabled? Is there nothing that I can do (hack)?
>
> Alexandru
>
> ------------------------------
> *From:* Ali Saidi <[email protected]>
> *To:* Iordan Alexandru <[email protected]>; gem5 users mailing list <
> [email protected]>
> *Sent:* Tuesday, August 9, 2011 9:31 PM
> *Subject:* Re: [gem5-users] About checkpointing
>
> You can't checkpoint the simulation with caches enabled. Any dirty state in
> the caches isn't saved in the checkpoint.
>
> Ali
>
>
> On Tue, 9 Aug 2011 03:29:47 -0700 (PDT), Iordan Alexandru <
> [email protected]> wrote:
>
> Hello
> I have been having problems using the checkpoint feature in GEM5. I tried
> to run a very simple scenario:
> 1. I launched the simulator with the command:
> ./build/ALPHA_FS/gem5.opt --outdir=test/ configs/example/fs.py -n 2
> --caches --l2cache
> 2. using m5term I created a checkpoint (witch was created with no errors)
> and then I exited the simulation
> 3. I tried to restore using the checkpoint:
> ./build/ALPHA_FS/gem5.opt --outdir=test/ configs/example/fs.py -n 2
> --caches --l2cache -r 1
> The message that I got in m5term is the following:
> ==== m5 slave terminal: Terminal 0 ====
> Unable to handle kernel paging request at virtual address 000000011fd2dd40
> Fixing recursive fault but reboot is needed!
> Unable to handle kernel paging request at virtual address 0000000000000004
> CPU 0 mount(761): Oops 0
> pc = [] ra = [] ps = 0000 Not tainted
> pc is at do_exit+0xf4/0x950
> ra is at do_exit+0x80/0x950
> v0 = 0000000000000007 t0 = 0000000000000004 t1 = fffffc001f4a96d0
> t2 = fffffc000085eca0 t3 = 0000000000000000 t4 = fffffc00008191c0
> t5 = 0000000000000ad7 t6 = 0000000000000031 t7 = fffffc001f354000
> s0 = 0000000000000009 s1 = fffffc001f4a9500 s2 = 0000000000000000
> s3 = 0000000000000000 s4 = 0000000000000000 s5 = 000000011fd2dd40
> s6 = 0000000000000000
> a0 = fffffc001f4a9500 a1 = fffffc000083c108 a2 = ffffffffffffffff
> a3 = 0000000000000000 a4 = 0000000000000008 a5 = 0000000000000009
> t8 = 0000000000000000 t9 = fffffc00006c9534 t10= 0000000000007fff
> t11= 00000000000003ff pv = fffffc000034f030 at = 0000000000000000
> gp = fffffc000085bf40 sp = fffffc001f357da0
> Trace:
> [] do_page_fault+0x3c0/0x4a0
> [] do_page_fault+0x3ac/0x4a0
> [] entMM+0x9c/0xc0
> [] do_group_exit+0x54/0x100
>
> Code: 402203a1 e4200001 b44400b0 a42a0358 20210004 60004000 40603122
> Fixing recursive fault but reboot is needed!
> Unable to handle kernel paging request at virtual address 0000000000000004
> CPU 0 mount(761): Oops 0
> pc = [] ra = [] ps = 0000 Tainted: G D
> pc is at do_exit+0xf4/0x950
> ra is at do_exit+0x80/0x950
> v0 = 0000000000000007 t0 = 0000000000000004 t1 = fffffc001f4a96d0
> t2 = fffffc000085eca0 t3 = 0000000000000000 t4 = fffffc00008191c0
> t5 = 0000000000000fed t6 = 0000000000000031 t7 = fffffc001f354000
> s0 = 000000000000000b s1 = fffffc001f4a9500 s2 = 0000000000000000
> s3 = fffffc001f357c38 s4 = 0000000000000000 s5 = 0000000000000004
> s6 = 0000000000000000
> a0 = fffffc001f4a9500 a1 = fffffc000083c108 a2 = ffffffffffffffff
> a3 = 0000000000000000 a4 = 0000000000000008 a5 = 0000000000000008
> t8 = 0000000000000000 t9 = fffffc00006c9534 t10= 0000000000007fff
> t11= 00000000000003ff pv = fffffc000034f030 at = 0000000000000000
> gp = fffffc000085bf40 sp = fffffc001f357b10
> Trace:
> [] die_if_kernel+0x12c/0x130
> [] die_if_kernel+0xd4/0x130
> [] do_page_fault+0x3ac/0x4a0
> [] entMM+0x9c/0xc0
> [] release_console_sem+0x20c/0x310
> [] release_console_sem+0x2b4/0x310
> [] vprintk+0x224/0x530
> [] vprintk+0x224/0x530
> [] do_exit+0x80/0x950
> [] exit_signals+0x0/0x190
> [] do_exit+0xf4/0x950
> [] do_page_fault+0x3c0/0x4a0
> [] do_page_fault+0x3ac/0x4a0
> [] entMM+0x9c/0xc0
> [] do_group_exit+0x54/0x100
>
> Code: 402203a1 e4200001 b44400b0 a42a0358 20210004 60004000 40603122
> Did I did something wrong here? Do I need to add something in the
> configuration file before I can use the checkpoint feature?
> Thank you in advance!
> Alexandru
>
> die_if_kernel recursion detected.
>
>
>
>
>
> _______________________________________________
> gem5-users mailing list
> [email protected]
> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
>
--
-Abhishek
Graduate Student
Computer Science
University of Virginia
---------------------------------------------------------------------------------------------------------------------
simplicity is the ultimate sophistication
-Leonardo da Vinci
diff -r b9ba22cb23f2 src/mem/cache/base.cc
--- a/src/mem/cache/base.cc Fri Jun 03 13:52:18 2011 -0500
+++ b/src/mem/cache/base.cc Wed Aug 10 21:34:14 2011 -0400
@@ -648,3 +648,35 @@
changeState(SimObject::Drained);
return 0;
}
+
+void
+BaseCache::serialize(std::ostream &os)
+{
+ //SERIALIZE_SCALAR(blkSize);
+ SERIALIZE_SCALAR(hitLatency);
+ //SERIALIZE_SCALAR(numTarget);
+ SERIALIZE_SCALAR(forwardSnoops);
+ SERIALIZE_SCALAR(isTopLevel);
+ SERIALIZE_SCALAR(blocked);
+ SERIALIZE_SCALAR(order);
+ SERIALIZE_SCALAR(blockedCycle);
+ SERIALIZE_SCALAR(missCount);
+ SERIALIZE_SCALAR(_numCpus);
+}
+
+void
+BaseCache::unserialize(Checkpoint *cp, const std::string §ion)
+{
+ //UNSERIALIZE_SCALAR(blkSize);
+ UNSERIALIZE_SCALAR(hitLatency);
+ //UNSERIALIZE_SCALAR(numTarget);
+ UNSERIALIZE_SCALAR(forwardSnoops);
+ UNSERIALIZE_SCALAR(isTopLevel);
+ UNSERIALIZE_SCALAR(blocked);
+ UNSERIALIZE_SCALAR(order);
+ UNSERIALIZE_SCALAR(blockedCycle);
+ UNSERIALIZE_SCALAR(missCount);
+ UNSERIALIZE_SCALAR(_numCpus);
+}
+
+
diff -r b9ba22cb23f2 src/mem/cache/base.hh
--- a/src/mem/cache/base.hh Fri Jun 03 13:52:18 2011 -0500
+++ b/src/mem/cache/base.hh Wed Aug 10 21:34:14 2011 -0400
@@ -58,7 +58,7 @@
#include "params/BaseCache.hh"
#include "sim/eventq.hh"
#include "sim/sim_exit.hh"
-
+#include "sim/serialize.hh"
class MSHR;
/**
* A basic cache interface. Implements some common functions for speed.
@@ -391,7 +391,10 @@
{
return blkSize;
}
-
+
+ void serialize(std::ostream &os);
+
+ void unserialize(Checkpoint *cp, const std::string §ion);
Addr blockAlign(Addr addr) const { return (addr & ~(Addr(blkSize - 1))); }
diff -r b9ba22cb23f2 src/mem/cache/cache.hh
--- a/src/mem/cache/cache.hh Fri Jun 03 13:52:18 2011 -0500
+++ b/src/mem/cache/cache.hh Wed Aug 10 21:34:14 2011 -0400
@@ -324,6 +324,11 @@
* Find next request ready time from among possible sources.
*/
Tick nextMSHRReadyTime();
+
+ void serialize(std::ostream &os);
+
+ void unserialize(Checkpoint *cp, const std::string §ion);
+
};
#endif // __CACHE_HH__
diff -r b9ba22cb23f2 src/mem/cache/cache_impl.hh
--- a/src/mem/cache/cache_impl.hh Fri Jun 03 13:52:18 2011 -0500
+++ b/src/mem/cache/cache_impl.hh Wed Aug 10 21:34:14 2011 -0400
@@ -61,6 +61,7 @@
#include "mem/cache/cache.hh"
#include "mem/cache/mshr.hh"
#include "sim/sim_exit.hh"
+#include <stdio.h>
template<class TagStore>
Cache<TagStore>::Cache(const Params *p, TagStore *tags, BasePrefetcher *pf)
@@ -765,7 +766,7 @@
Addr blk_addr = blockAlign(pkt->getAddr());
BlkType *blk = tags->findBlock(pkt->getAddr());
MSHR *mshr = mshrQueue.findMatch(blk_addr);
-
+ printf("inside functional \n");
pkt->pushLabel(name());
CacheBlkPrintWrapper cbpw(blk);
@@ -1720,3 +1721,29 @@
delete sendEvent;
sendEvent = new SendEvent(this);
}
+
+
+template<class TagStore>
+void
+Cache<TagStore>::serialize(std::ostream &os)
+{
+ SimObject::State so_state = SimObject::getState();
+ SERIALIZE_ENUM(so_state);
+ BaseCache::serialize(os);
+
+ (*tags).serialize(os);
+
+}
+
+template<class TagStore>
+void
+Cache<TagStore>::unserialize(Checkpoint *cp, const std::string §ion)
+{
+
+ SimObject::State so_state;
+ UNSERIALIZE_ENUM(so_state);
+ BaseCache::unserialize(cp, section);
+
+ (*tags).unserialize(cp, section);
+
+}
diff -r b9ba22cb23f2 src/mem/cache/tags/base.cc
--- a/src/mem/cache/tags/base.cc Fri Jun 03 13:52:18 2011 -0500
+++ b/src/mem/cache/tags/base.cc Wed Aug 10 21:34:14 2011 -0400
@@ -103,3 +103,20 @@
registerExitCallback(new BaseTagsCallback(this));
}
+
+
+void
+BaseTags::serialize(std::ostream &os)
+{
+ SERIALIZE_SCALAR(warmupBound);
+ SERIALIZE_SCALAR(warmedUp);
+ SERIALIZE_SCALAR(numBlocks);
+}
+
+void
+BaseTags::unserialize(Checkpoint *cp, const std::string §ion)
+{
+ UNSERIALIZE_SCALAR(warmupBound);
+ UNSERIALIZE_SCALAR(warmedUp);
+ UNSERIALIZE_SCALAR(numBlocks);
+}
diff -r b9ba22cb23f2 src/mem/cache/tags/base.hh
--- a/src/mem/cache/tags/base.hh Fri Jun 03 13:52:18 2011 -0500
+++ b/src/mem/cache/tags/base.hh Wed Aug 10 21:34:14 2011 -0400
@@ -41,7 +41,7 @@
#include "base/callback.hh"
#include "base/statistics.hh"
-
+#include "sim/serialize.hh"
class BaseCache;
/**
@@ -147,6 +147,10 @@
*Needed to clear all lock tracking at once
*/
virtual void clearLocks() {}
+
+ void serialize(std::ostream &os);
+
+ void unserialize(Checkpoint *cp, const std::string §ion);
};
class BaseTagsCallback : public Callback
diff -r b9ba22cb23f2 src/mem/cache/tags/lru.cc
--- a/src/mem/cache/tags/lru.cc Fri Jun 03 13:52:18 2011 -0500
+++ b/src/mem/cache/tags/lru.cc Wed Aug 10 21:34:14 2011 -0400
@@ -235,3 +235,150 @@
}
}
}
+
+void
+LRU::serialize(std::ostream &os)
+{
+ BaseTags::serialize(os);
+
+ //SERIALIZE_SCALAR(numSets);
+ //SERIALIZE_SCALAR(blkSize);
+ //SERIALIZE_SCALAR(assoc);
+ //SERIALIZE_SCALAR(hitLatency);
+ SERIALIZE_SCALAR(setShift);
+ SERIALIZE_SCALAR(tagShift);
+ SERIALIZE_SCALAR(setMask);
+ SERIALIZE_SCALAR(blkMask);
+
+ vector<int> blk_asid;
+ vector<Addr> blk_tag;
+ vector<uint8_t> blk_data;
+ vector<int> blk_size;
+ vector<unsigned> blk_status;
+ vector<Tick> blk_whenReady;
+ vector<int> blk_set;
+ vector<bool> blk_isTouched;
+ vector<int> blk_refCount;
+ vector<int> blk_contextSrc;
+
+ unsigned blkIndex = 0;
+ for (unsigned i = 0; i < numSets; ++i)
+ {
+ for (unsigned j = 0; j < assoc; ++j)
+ {
+ BlkType *blk = &blks[blkIndex];
+
+ blk_asid.push_back(blk->asid);
+ blk_tag.push_back(blk->tag);
+
+ for (unsigned k=0; k<blkSize; k++)
+ {
+ blk_data.push_back(dataBlks[blkIndex*blkSize + k]);
+ }
+ blk_size.push_back(blk->size);
+ blk_status.push_back(blk->status);
+ blk_whenReady.push_back(blk->whenReady);
+ blk_set.push_back(blk->set);
+ blk_isTouched.push_back(blk->isTouched);
+ blk_refCount.push_back(blk->refCount);
+ blk_contextSrc.push_back(blk->contextSrc);
+
+ ++blkIndex;
+ }
+ }
+
+ arrayParamOut(os, "blk_asid", blk_asid);
+ arrayParamOut(os, "blk_tag", blk_tag);
+ arrayParamOut(os, "blk_data", blk_data);
+ arrayParamOut(os, "blk_size", blk_size);
+ arrayParamOut(os, "blk_status", blk_status);
+ arrayParamOut(os, "blk_whenReady", blk_whenReady);
+ arrayParamOut(os, "blk_set", blk_set);
+ arrayParamOut(os, "blk_isTouched", blk_isTouched);
+ arrayParamOut(os, "blk_refCount", blk_refCount);
+ arrayParamOut(os, "blk_contextSrc", blk_contextSrc);
+
+}
+
+void
+LRU::unserialize(Checkpoint *cp, const std::string §ion)
+{
+ BaseTags::unserialize(cp, section);
+
+ //UNSERIALIZE_SCALAR(numSets);
+ //UNSERIALIZE_SCALAR(blkSize);
+ //UNSERIALIZE_SCALAR(assoc);
+ //UNSERIALIZE_SCALAR(hitLatency);
+ UNSERIALIZE_SCALAR(setShift);
+ UNSERIALIZE_SCALAR(tagShift);
+ UNSERIALIZE_SCALAR(setMask);
+ UNSERIALIZE_SCALAR(blkMask);
+
+ vector<int> blk_asid;
+ vector<Addr> blk_tag;
+ vector<uint8_t> blk_data;
+ vector<int> blk_size;
+ vector<unsigned> blk_status;
+ vector<Tick> blk_whenReady;
+ vector<int> blk_set;
+ vector<bool> blk_isTouched;
+ vector<int> blk_refCount;
+ vector<int> blk_contextSrc;
+
+ arrayParamIn(cp, section, "blk_asid", blk_asid);
+ arrayParamIn(cp, section, "blk_tag", blk_tag);
+ arrayParamIn(cp, section, "blk_data", blk_data);
+ arrayParamIn(cp, section, "blk_size", blk_size);
+ arrayParamIn(cp, section, "blk_status", blk_status);
+ arrayParamIn(cp, section, "blk_whenReady", blk_whenReady);
+ arrayParamIn(cp, section, "blk_set", blk_set);
+ arrayParamIn(cp, section, "blk_isTouched", blk_isTouched);
+ arrayParamIn(cp, section, "blk_refCount", blk_refCount);
+ arrayParamIn(cp, section, "blk_contextSrc", blk_contextSrc);
+
+ delete [] dataBlks;
+ delete [] blks;
+ delete [] sets;
+
+ sets = new CacheSet[numSets];
+ blks = new BlkType[numSets * assoc];
+ dataBlks = new uint8_t[numBlocks * blkSize];
+
+ unsigned blkIndex = 0;
+ for (unsigned i = 0; i < numSets; ++i)
+ {
+ sets[i].assoc = assoc;
+
+ sets[i].blks = new BlkType*[assoc];
+
+
+ for (unsigned j = 0; j < assoc; ++j)
+ {
+ for(unsigned k=0; k<blkSize; k++)
+ {
+ dataBlks[blkSize*blkIndex + k] = blk_data[blkSize*blkIndex + k];
+ }
+
+ BlkType *blk = &blks[blkIndex];
+
+ blk->data = &dataBlks[blkSize*blkIndex];
+
+ sets[i].blks[j] = blk;
+
+ blk->asid = blk_asid[blkIndex];
+ blk->tag = blk_tag[blkIndex];
+ blk->size = blk_size[blkIndex];
+ blk->status = blk_status[blkIndex];
+ blk->whenReady = blk_whenReady[blkIndex];
+ blk->set = blk_set[blkIndex];
+ blk->isTouched = blk_isTouched[blkIndex];
+ blk->refCount = blk_refCount[blkIndex];
+ blk->contextSrc = blk_contextSrc[blkIndex];
+
+ ++blkIndex;
+ }
+ }
+
+}
+
+
diff -r b9ba22cb23f2 src/mem/cache/tags/lru.hh
--- a/src/mem/cache/tags/lru.hh Fri Jun 03 13:52:18 2011 -0500
+++ b/src/mem/cache/tags/lru.hh Wed Aug 10 21:34:14 2011 -0400
@@ -43,7 +43,7 @@
#include "mem/cache/tags/base.hh"
#include "mem/cache/blk.hh"
#include "mem/packet.hh"
-
+#include "sim/serialize.hh"
class BaseCache;
class CacheSet;
@@ -234,6 +234,10 @@
* Called at end of simulation to complete average block reference stats.
*/
virtual void cleanupRefs();
+
+ void serialize(std::ostream &os);
+
+ void unserialize(Checkpoint *cp, const std::string §ion);
};
#endif // __MEM_CACHE_TAGS_LRU_HH__
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