Sorry but i still have two question: 1. Can i run Ruby mode for splash2 using the configs/splash2/run.py scripts.Because it seems there is nothing about ruby options in that scripts. 2. Can i run ruby in O3CPU mode,because it is said that "Ruby only works with TimingSimpleCPU!!" in the se.py scripts.
Thanks for patiention and i am very grateful for your reply. On Wed, Sep 21, 2011 at 9:17 PM, DF liu <[email protected]> wrote: > I got it~ > Thanks a lot > > On Wed, Sep 21, 2011 at 8:38 PM, Tao Zhang <[email protected]>wrote: > >> Hi DF,**** >> >> ** ** >> >> The “MI_example” (or other Ruby protocols) is only enabled when you set >> the option“--ruby” in your command. Otherwise, the classic memory system >> will be used alternatively. Please read se.py for the detail. **** >> >> ** ** >> >> -Tao**** >> >> ** ** >> >> *From:* [email protected] [mailto:[email protected]] >> *On Behalf Of *DF liu >> *Sent:* Tuesday, September 20, 2011 11:47 PM >> *To:* gem5 users mailing list >> >> *Subject:* Re: [gem5-users] Is M5 support snooping cache coherence**** >> >> ** ** >> >> Thank you, Tao~ **** >> >> But i see ./build_opts/ALPHA_SE as:**** >> >> FULL_SYSTEM = 0**** >> >> SS_COMPATIBLE_FP = 1**** >> >> CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU,InOrderCPU'**** >> >> PROTOCOL = 'MI_example'**** >> >> And i find that MI_example are also based Ruby**** >> >> **** >> >> On Tue, Sep 20, 2011 at 11:24 PM, Tao Zhang <[email protected]> >> wrote:**** >> >> Hi DF,**** >> >> **** >> >> You can use ALPHA_SE as the platform and then run your simulation. The >> classic memory system is set by default. The directory-based cache coherence >> are all implemented via Ruby. **** >> >> **** >> >> Tao**** >> >> On Tue, Sep 20, 2011 at 10:50 AM, DF liu <[email protected]> wrote:**** >> >> Thanks a lot for you reply! **** >> >> I have read the page and i still have a question, how to enable the >> classic memory model(because in build_opts dir,i find all configures are >> using Cache coherence based directory)**** >> >> Any suggestions are appreciated.**** >> >> On Tue, Sep 20, 2011 at 10:19 PM, Tao Zhang <[email protected]> >> wrote:**** >> >> Hi DF,**** >> >> **** >> >> The classic memory model leverages MOESI snooping protocol. Please refer >> to http://www.gem5.org/Classic_Memory_System for the detail.**** >> >> **** >> >> -Tao**** >> >> **** >> >> *From:* [email protected] [mailto:[email protected]] >> *On Behalf Of *DF liu >> *Sent:* Monday, September 19, 2011 11:14 PM >> *To:* [email protected] >> *Subject:* Re: [gem5-users] Is M5 support snooping cache coherence**** >> >> **** >> >> No one knows?**** >> >> On Mon, Sep 19, 2011 at 11:00 AM, DF liu <[email protected]> wrote:**** >> >> I have read following page but find that all Cache Coherence are directory >> based.Any one know about that the M5 support any snooping based cache >> coherence.**** >> >> http://gem5.org/Cache_Coherence_Protocols**** >> >> **** >> >> Any suggestions are appreciated~**** >> >> **** >> >> Best Regards,**** >> >> >> Sigma <http://www.sigma.me/>**** >> >> Graduate student of ICT <http://www.ict.ac.cn/>: >> Address:Institute of Computing Technology,No.6 Kexueyuan South Road >> Zhongguancun,Haidian District Beijing,P.R.China 100190 >> Tel: 86 10 62600851 >> Email: [email protected]**** >> >> Site: www.sigma.me**** >> >> **** >> >> **** >> >> ** ** >> >> _______________________________________________ >> gem5-users mailing list >> [email protected] >> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users**** >> >> ** ** >> >> >> _______________________________________________ >> gem5-users mailing list >> [email protected] >> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users**** >> >> ** ** >> >> >> _______________________________________________ >> gem5-users mailing list >> [email protected] >> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users**** >> >> ** ** >> >> _______________________________________________ >> gem5-users mailing list >> [email protected] >> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >> > >
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