Don't use the DRAM memory. It should probably be deleted from the tree.

Just like the warning message says when the simulator starts:
> warn: This DRAM module has not been tested with the new memory system at all!

Ali



On Sep 28, 2011, at 9:28 PM, XIANGYU wrote:

> I want to have a detailed DRAM model, so I decide to use the derived
> class DRAMMemory instead of PhysicalMemory.  Basically, I changed the
> configs/common/FSConfig.py file
> ==from==
> self.physmem = PhysicalMemory(range = AddrRange(Addr(mdesc.mem())),
>                                     zero = True)
> ==to==
> self.physmem = DRAMMemory(range = AddrRange(Addr(mdesc.mem())),
>                                     zero = True)
> 
> After that I can boot ARM_FS with timing correctly, and the DRAM stats
> are collected
> ./build/ARM_FS/m5.opt configs/example/fs.py -t
> 
> However, it seems that it cannot be run under the normal atomic mode.
> When I run
> ./build/ARM_FS/m5.opt configs/example/fs.py   (without "-t")
> I got the following errors:
> 
> gem5 Simulator System.  http://gem5.org
> gem5 is copyrighted software; use the --copyright option for details.
> 
> gem5 compiled Sep 27 2011 19:14:02
> gem5 started Sep 28 2011 12:02:44
> gem5 executing on xiangyud-t420
> command line: ./build/ARM_FS/m5.opt configs/example/fs.py
> Global frequency set at 1000000000000 ticks per second
> warn: This DRAM module has not been tested with the new memory system at all!
> info: kernel located at:
> /home/xiangyud/workspace/gem5-system/binaries/vmlinux.arm.smp.fb.2.6.38.8
> info: Using bootloader at address 0x80000000
> Listening for system connection on port 5900
> Listening for system connection on port 3456
> 0: system.remote_gdb.listener: listening for remote gdb #0 on port 7000
> **** REAL SIMULATION ****
> info: Entering event queue @ 0.  Starting simulation...
> warn: The clidr register always reports 0 caches.
> warn: clidr LoUIS field of 0b001 to match current ARM implementations.
> warn: The csselr register isn't implemented.
> warn: The ccsidr register isn't implemented and always reads as 0.
> warn:   instruction 'mcr bpiallis' unimplemented
> warn:   instruction 'mcr icialluis' unimplemented
> 1445560000: system.terminal: attach terminal 0
> warn:   instruction 'mcr dccimvac' unimplemented
> warn:   instruction 'mcr dccmvau' unimplemented
> warn:   instruction 'mcr icimvau' unimplemented
> warn: LCD dual screen mode not supported
> m5.opt: build/ARM_FS/sim/eventq.hh:482: void
> EventQueue::schedule(Event*, Tick): Assertion `(UTick)when >=
> (UTick)curTick()' failed.
> Program aborted at cycle 37575153000
> Aborted
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