Hi
thanks for the tip. I will follow that.

On 10/1/11, Jack Harvard <[email protected]> wrote:
> The p->latency is passed to hitLatency in line58 of the base.cc file.
> http://grok.m5sim.org/source/xref/m5/src/mem/cache/base.cc
>
> Then search for hitLatency
> http://grok.m5sim.org/source/search?q=hitLatency&project=m5&defs=&refs=&path=&hist=
>
> Then go to cache_impl.hh, you see something like this:
>     415     Tick time =  curTick() + hitLatency;
>
> Does this help?
>
> On Fri, Sep 30, 2011 at 8:50 PM, Mahmood Naderan <[email protected]>
> wrote:
>> Grepping "latency" or "l2" returns a lot of result. Where is that
>> "cache constructor" ?
>>
>> On 9/30/11, Jack Harvard <[email protected]> wrote:
>>> For that, why not you have a look at the cache constructor where this
>>> latency value is being passed to a parameter, and then trace that
>>> parameter?
>>>  A few search and grep will find out the answers.
>>>
>>> On 30 Sep 2011, at 17:46, Mahmood Naderan wrote:
>>>
>>>> thanks but I want to know how this value affect IPC? which files in
>>>> src/ use this value? Which one is the first that grab this value and
>>>> schedule that?
>>>>
>>>> On 9/30/11, Jack Harvard <[email protected]> wrote:
>>>>> There's a parameter 'latency' in the cache config .py file:
>>>>> http://grok.m5sim.org/source/xref/m5/src/mem/cache/BaseCache.py
>>>>>
>>>>> You can set the value from a python config file or pass through command
>>>>> line.
>>>>>
>>>>> Jack Harvard
>>>>>
>>>>> On Fri, Sep 30, 2011 at 2:47 PM, Mahmood Naderan <[email protected]>
>>>>> wrote:
>>>>>> Hi,
>>>>>> I am looking to find out how setting a latency for a cache level
>>>>>> works. However till now I couldn't figure out how it works.
>>>>>>
>>>>>> Can some one explain or point a documentation about that? which files
>>>>>> are used in this process?
>>>>>>
>>>>>> thanks
>>>>>> --
>>>>>> // Naderan *Mahmood;
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>>>>>>
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>>>>
>>>>
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>>>> --
>>>> // Naderan *Mahmood;
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>>
>> --
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>> // Naderan *Mahmood;
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-- 
--
// Naderan *Mahmood;
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