I'm not sure but as far as I know,
default page size of alpha is 8KB, as described in
"arch/alpha/isa_traits.hh" file, LogVMPageSize

2011/10/24  <[email protected]>:
> Send gem5-users mailing list submissions to
>        [email protected]
>
> To subscribe or unsubscribe via the World Wide Web, visit
>        http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
> or, via email, send a message with subject or body 'help' to
>        [email protected]
>
> You can reach the person managing the list at
>        [email protected]
>
> When replying, please edit your Subject line so it is more specific
> than "Re: Contents of gem5-users digest..."
>
>
> Today's Topics:
>
>   1. width_spacing_model (lyh)
>   2. How do i set "len" of OrionLink (lyh)
>   3. Question about multiprogrammed workload (Xuehan Xu)
>   4. Default Page size of alpha architecture in SE mode
>      (Tripti Warrier)
>   5. Re: difference between cpux and switch_cpusx (Mahmood Naderan)
>   6. Question about interprocess communication (Xuehan Xu)
>   7. Re: Question about interprocess communication
>      (Gabriel Michael Black)
>   8. Re: Question about interprocess communication (Xuehan Xu)
>   9. Changing states in Sequencer.C (Jiho "Ray" Choi)
>
>
> ----------------------------------------------------------------------
>
> Message: 1
> Date: Mon, 24 Oct 2011 10:21:54 +0800 (CST)
> From: lyh <[email protected]>
> To: gem5-users <[email protected]>
> Subject: [gem5-users] width_spacing_model
> Message-ID: <[email protected]>
> Content-Type: text/plain; charset="gbk"
>
> Hi,
> What's the relationship between OrionLink and BasicLink? If i want to set 
> each link a different width_spacing_model for a network, what should I do? In 
> other words, where should i do configuration?
>
> lyh
> -------------- next part --------------
> An HTML attachment was scrubbed...
> URL: 
> <http://m5sim.org/cgi-bin/mailman/private/gem5-users/attachments/20111024/35a466bd/attachment-0001.html>
>
> ------------------------------
>
> Message: 2
> Date: Mon, 24 Oct 2011 10:36:39 +0800 (CST)
> From: lyh <[email protected]>
> To: gem5-users <[email protected]>
> Subject: [gem5-users] How do i set "len" of OrionLink
> Message-ID: <[email protected]>
> Content-Type: text/plain; charset="gbk"
>
> Hi,
> How do i set "len" of OrionLink ?
> lyh
> -------------- next part --------------
> An HTML attachment was scrubbed...
> URL: 
> <http://m5sim.org/cgi-bin/mailman/private/gem5-users/attachments/20111024/d08fb830/attachment-0001.html>
>
> ------------------------------
>
> Message: 3
> Date: Mon, 24 Oct 2011 11:13:17 +0800
> From: Xuehan Xu <[email protected]>
> To: gem5 users mailing list <[email protected]>
> Subject: [gem5-users] Question about multiprogrammed workload
> Message-ID:
>        <CAJACTud-4eA0EOgnxHnE0L8AT0B4vE0WO84f=s5t3xqd07s...@mail.gmail.com>
> Content-Type: text/plain; charset="iso-8859-1"
>
> Hi, all
>     I saw that in SE mode, we can create a system with multiple CPUs and
> assign a different workload object to each CPU's workload parameter, can
> these workload communicate with each other just like in a real machine that
> different processes communicate with each other?
> -------------- next part --------------
> An HTML attachment was scrubbed...
> URL: 
> <http://m5sim.org/cgi-bin/mailman/private/gem5-users/attachments/20111024/225a7175/attachment-0001.html>
>
> ------------------------------
>
> Message: 4
> Date: Mon, 24 Oct 2011 11:54:57 +0530
> From: Tripti Warrier <[email protected]>
> To: [email protected]
> Subject: [gem5-users] Default Page size of alpha architecture in SE
>        mode
> Message-ID:
>        <CADm1+L6i2qtq=mHjjSzZdRZJDf6WRQP8Gi3dEZx96297s6cZ=w...@mail.gmail.com>
> Content-Type: text/plain; charset="iso-8859-1"
>
> Hi All,
>
>
> What is the default page size of Alpha architecture in  SE mode. Where is it
> defined ?
> I wanted to find and modify the Page size  for alpha architecture in this
> mode.
>
> --
> Thanks,
>
> Tripti
> -------------- next part --------------
> An HTML attachment was scrubbed...
> URL: 
> <http://m5sim.org/cgi-bin/mailman/private/gem5-users/attachments/20111024/f5975231/attachment-0001.html>
>
> ------------------------------
>
> Message: 5
> Date: Mon, 24 Oct 2011 09:59:12 +0330
> From: Mahmood Naderan <[email protected]>
> To: gem5 users mailing list <[email protected]>
> Subject: Re: [gem5-users] difference between cpux and switch_cpusx
> Message-ID:
>        <cada2p2xcr69t4mpjufplencmz0udyuvv6q1d0iwec5kna3p...@mail.gmail.com>
> Content-Type: text/plain; charset=UTF-8
>
> Hi
> As I used O3CPU, switch_cpu represents O3CPU (the cpu after switch)
>
> On 10/23/11, ??? <[email protected]> wrote:
>>  hi,
>>     Is anyone know what is the difference between cpux and switch_cpusx? For
>> example, cpu2 and switch_cpu2?
>>
>
>
> --
> --
> // Naderan *Mahmood;
>
>
> ------------------------------
>
> Message: 6
> Date: Mon, 24 Oct 2011 14:42:15 +0800
> From: Xuehan Xu <[email protected]>
> To: gem5 users mailing list <[email protected]>
> Subject: [gem5-users] Question about interprocess communication
> Message-ID:
>        <CAJACTufS6=cevwo9jo4utlvp4g1hs8n4db4qpcszdfcufex...@mail.gmail.com>
> Content-Type: text/plain; charset="iso-8859-1"
>
> Hi, all
> When running multiple processes on gem5 in the SE mode with multiple cpus,
> is there any way to establish a shared memory or other interprocess
> communication machism to let the processes communicate with each other? Can
> I use pipe?
> -------------- next part --------------
> An HTML attachment was scrubbed...
> URL: 
> <http://m5sim.org/cgi-bin/mailman/private/gem5-users/attachments/20111024/1099cc8d/attachment-0001.html>
>
> ------------------------------
>
> Message: 7
> Date: Mon, 24 Oct 2011 03:25:15 -0400
> From: Gabriel Michael Black <[email protected]>
> To: [email protected]
> Subject: Re: [gem5-users] Question about interprocess communication
> Message-ID: <[email protected]>
> Content-Type: text/plain;       charset=ISO-8859-1;     DelSp="Yes";
>        format="flowed"
>
> Not that I know of. You could get it to work by adding support for the
> necessary system calls, but it would probably be easier to use FS mode.
>
> Gabe
>
> Quoting Xuehan Xu <[email protected]>:
>
>> Hi, all
>> When running multiple processes on gem5 in the SE mode with multiple cpus,
>> is there any way to establish a shared memory or other interprocess
>> communication machism to let the processes communicate with each other? Can
>> I use pipe?
>>
>
>
>
>
>
> ------------------------------
>
> Message: 8
> Date: Mon, 24 Oct 2011 17:31:51 +0800
> From: Xuehan Xu <[email protected]>
> To: gem5 users mailing list <[email protected]>
> Subject: Re: [gem5-users] Question about interprocess communication
> Message-ID:
>        <cajactufaasp8errb_5sfad38x3lw_ynnenb0v5srzplemwe...@mail.gmail.com>
> Content-Type: text/plain; charset="iso-8859-1"
>
> Thanks very muck, sir:-)
>
> On 24 October 2011 15:25, Gabriel Michael Black <[email protected]>wrote:
>
>> Not that I know of. You could get it to work by adding support for the
>> necessary system calls, but it would probably be easier to use FS mode.
>>
>> Gabe
>>
>>
>> Quoting Xuehan Xu <[email protected]>:
>>
>>  Hi, all
>>> When running multiple processes on gem5 in the SE mode with multiple cpus,
>>> is there any way to establish a shared memory or other interprocess
>>> communication machism to let the processes communicate with each other?
>>> Can
>>> I use pipe?
>>>
>>>
>>
>>
>> ______________________________**_________________
>> gem5-users mailing list
>> [email protected]
>> http://m5sim.org/cgi-bin/**mailman/listinfo/gem5-users<http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users>
>>
> -------------- next part --------------
> An HTML attachment was scrubbed...
> URL: 
> <http://m5sim.org/cgi-bin/mailman/private/gem5-users/attachments/20111024/479ac068/attachment-0001.html>
>
> ------------------------------
>
> Message: 9
> Date: Mon, 24 Oct 2011 21:19:28 +0900
> From: "Jiho \"Ray\" Choi" <[email protected]>
> To: gem5-users <[email protected]>
> Subject: [gem5-users] Changing states in Sequencer.C
> Message-ID:
>        <cabekv0ncxuciksz4jt6ottdf6utf9rg3a+qq5dtq3lnoxqf...@mail.gmail.com>
> Content-Type: text/plain; charset="iso-8859-1"
>
> Hello,
>
> I am trying to connect Acquire/Release instructions to the protocol, and I
> want to change the states of multiple cache lines at once upon
> Acquire/Release instructions.
>
> 1. I was thinking of changing the states of cache lines in Sequencer.C
> instead of sending multiple requests to the L1 controller.
> I was wondering if it is possible and if changing the states in the
> sequencer should be avoided for any reason. I read that I should not add any
> modification which makes the sequencer dependable on a specific protocol,
> and I am afraid I am violating the rule (or recommendation?).
>
> 2. If I am not allowed to change the states in the sequencer, I am going to
> first stall the processor, and then walk through the L1 cache to send
> Acquire requests to every cache line of L1. After finishing all the
> necessary state changes, then I will unstall the processor and let the
> simics handle the next instruction. Is there anyone who did similar work
> before? Does it sound feasible?
>
> Any comment/advice would be highly appreciated.
> Thank you.
>
> Best Regards,
> Ray
> -------------- next part --------------
> An HTML attachment was scrubbed...
> URL: 
> <http://m5sim.org/cgi-bin/mailman/private/gem5-users/attachments/20111024/c3b26f8d/attachment.html>
>
> ------------------------------
>
> _______________________________________________
> gem5-users mailing list
> [email protected]
> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
>
> End of gem5-users Digest, Vol 63, Issue 34
> ******************************************
>
_______________________________________________
gem5-users mailing list
[email protected]
http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

Reply via email to