Hi all,
As we all know, gem5 supports non inclusive hierarchy, but as per
the definition of non inclusiveness, we need not to invalidate the L2 blocks
whenever we are responding to ReadEx or busUpgrade requests from L1. The
code in the satisfy cpuside request does the same for all the upgradereq and
readeX requests.
Is this some kind of optimizations done by gem5 members as it's not
necessary as per the definition. correct me if i am wrong
--
*thanks®ards
*
*BISWABANDAN*
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