I'm pretty sure there's a bug in the predecoder for x86 on this line:

http://repo.gem5.org/gem5/file/330f8109b199/src/arch/x86/predecoder.cc#l189

The condition of the if should be

else if(emi.opcode.num == 2 && (nextByte == 0x38 || nextByte == 0x3A))

and not:

else if(emi.opcode.num == 2 && (nextByte == 0x38 || nextByte == 0x3F))

The 0x3F at the end should be 0x3A. I'll fix this in the repository soon, but in the mean time you can fix your copy locally.

Gabe

Quoting Mahmood Naderan <[email protected]>:

I debugged to find the faulty instruction. So I paste the logs:

the exec debug shows:
111733468000: system.cpu T0 : @memset+30.2  :   IMUL_R_R : muleh   t0,
t18,  : IntAlu :  D=0x0000000000000000
111733468000: system.cpu T0 : @memset+34.0  :   CMP_R_I : limm   t1,
0x90 : IntAlu :  D=0x0000000000000090
111733468000: system.cpu T0 : @memset+34.1  :   CMP_R_I : sub   t0,
r8, t1 : IntAlu :  D=0x00000000000000a5
111733468000: system.cpu T0 : @memset+41.0  :   JNLE_I : rdip   t1,
%ctrl153,  : IntAlu :  D=0x000000000065f14f
111733468000: system.cpu T0 : @memset+41.1  :   JNLE_I : limm   t2,
0x2d1 : IntAlu :  D=0x00000000000002d1
111733468000: system.cpu T0 : @memset+41.2  :   JNLE_I : wrip   , t1,
t2 : IntAlu :
panic: X86 decoder internal error: 'Three byte opcode shouldn't be
handled by two_byte_opcodes.isa!'




and the O3 debug shows:
111733481000: global: DynInst: [sn:365868543] Instruction destroyed.
Instcount for system.cpu = 96
111733481000: global: DynInst: [sn:365868523] Instruction destroyed.
Instcount for system.cpu = 95
111733481000: global: DynInst: [sn:365868518] Instruction destroyed.
Instcount for system.cpu = 94
111733481000: system.cpu: Activity: 9
111733481000: system.cpu: Scheduling next tick!
111733482000: system.cpu.fetch-iport: Received timing
111733482000: system.cpu.fetch: [tid:0] Waking up from cache miss.
111733482000: system.cpu: CPU already running.
111733482000: system.cpu.fetch: [tid:0] Activating fetch due to cache completion
111733482000: system.cpu.fetch: Activating stage.
111733482000: system.cpu: Activity: 10
111733482000: system.cpu:

FullO3CPU: Ticking main, FullO3CPU.
111733482000: system.cpu.fetch: Running stage.
111733482000: system.cpu.fetch: Attempting to fetch from [tid:0]
111733482000: system.cpu.fetch: [tid:0]: Icache miss is complete.
111733482000: system.cpu.fetch: [tid:0]: Adding instructions to queue to decode.
panic: X86 decoder internal error: 'Three byte opcode shouldn't be
handled by two_byte_opcodes.isa!'


The complete error message is:

panic: X86 decoder internal error: 'Three byte opcode shouldn't be
handled by two_byte_opcodes.isa!'
{
       leg = 0x10,
       rex = 0,
       op = {
               num = 2,
               op = 0x3a,
               prefixA = 0xf,
               prefixB = 0
       },
       modRM = 0,
       sib = 0,
       immediate = 0,
       displacement = 0
       dispSize = 0}

 @ cycle 111733482000
[decodeInst:build/X86_SE/arch/x86/decoder.cc, line 108799]

Thanks for any idea.
Regards

On 11/13/11, Mahmood Naderan <[email protected]> wrote:
I found many some spek2k6 (astar, gamess, gcc, mcf, omnetpp, ....) faced
this error.




I really appreciate any comment or patch from developers.

thanks
--
// Naderan *Mahmood;


On Wed, Nov 9, 2011 at 10:10 AM, Mahmood Naderan
<[email protected]>wrote:

Hi,
With '-d' option in X86_SE, I get this error:

info: Entering event queue @ 339774000.  Starting simulation...
panic: X86 decoder internal error: 'Three byte opcode shouldn't be
handled by two_byte_opcodes.isa!'
{
       leg = 0x10,
       rex = 0,
       op = {
               num = 2,
               op = 0x3a,
               prefixA = 0xf,
               prefixB = 0
       },
       modRM = 0,
       sib = 0,
       immediate = 0,
       displacement = 0
       dispSize = 0}

 @ cycle 340216000
[decodeInst:build/X86_SE/arch/x86/decoder.cc, line 108799]


It is stated that decoder.cc is generated automatically. So is there
any idea bout that?
thanks

--
// Naderan *Mahmood;




--
--
// Naderan *Mahmood;
_______________________________________________
gem5-users mailing list
[email protected]
http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users



_______________________________________________
gem5-users mailing list
[email protected]
http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

Reply via email to