My reason for this (no branch prediction in TimingSimpleCPU) was that the purpose of a branch prediction is to change the flow of incomming instructions while that branch instruction is not committed and that means out of order.
Thanks for your help. On 11/20/11, Anthony Gutierrez <[email protected]> wrote: > The simple CPUs, atomic and timing, execute a single instruction in its > entirety each cycle. Thus, they do not require branch prediction. > > -Tony > > On Sun, Nov 20, 2011 at 7:59 AM, Mahmood Naderan > <[email protected]>wrote: > >> hi, >> how branch instructions are predicted in a TimingSimpleCPU? As I >> searched the code, there is no branch predictor for that. >> >> Thanks >> -- >> // Naderan *Mahmood; >> _______________________________________________ >> gem5-users mailing list >> [email protected] >> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >> > -- -- // Naderan *Mahmood; _______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
