On Fri, Feb 3, 2012 at 4:14 PM, Gabriel Michael Black <[email protected] > wrote:
> Quoting Paul Rosenfeld <[email protected]>: > > Hello all, >> >> After figuring out how to more or less bend the isa generation system to >> my >> will, I've come across a bit of confusion. >> >> I've written a new instruction format modeled after LoadOrNop. I have a >> code block that I pass from the decoder.isa into my instruction format >> which is then put into the execute() function via a substitution. >> >> I've noticed that if this code block looks like {{Ra.uq = Rb.uq + Rc.uq}}, >> then the IsMemRef flag isn't set and the execute() function is called. If, >> however, I put add something like {{ Mem = Rb.uq + Rc.uq}}, then I get the >> IsMemRef flag set and the initiateAcc() function is called, but the >> execute() function is not. Should I just not bother writing an execute() >> function for memory accesses? >> > > Yes, that's right. > > > >> The other confusing thing is I can't figure out if the code block {{ Mem = >> Rb.uq + Rc.uq }} actually has any effect if I never substitute it (i.e. I >> never actually write %(code)s in any of my templates). It appears that it >> still sets the IsMemRef and the IsStore flags in the decoder constructor, >> but other than that it doesn't have any other effect. Is this the correct >> interpretation? >> > > That sounds plausible. It's a little unusual not to use %(code)s in your > templates. > I know that sounds a little silly, but let me try to explain what I'm after. I want my new instruction to go through the memory stage of the pipeline because it will be modifying memory, but all of the operands are addresses in registers. This means that when I express my actual code block, there's not a memory operand involved, so I don't get the IsMemRef flag set. So I was playing around and I found a hack where if I pass two code blocks, I can have the parser mark the code as a memory read (and set IsMemRef) by passing in a code block that references memory but is unused. The other code block is what calls the actual function in the CPU, but only contains register operands that contain addresses. Is there a way I can force the parser to treat my instruction as a memory read without using such a hack? > > Gabe > ______________________________**_________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/**mailman/listinfo/gem5-users<http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users> >
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