I misspoke earlier, that configuration would give you a direct mapped cache. But, you are not using that configuration from what I can tell.
A 64B L1 with a block size of 64 will give you a single cache line. You cannot have 4-way associativity in this case. Similarly, your L2 will give you a max of 8 lines, and a max of 8-way associativity. On Fri, Feb 10, 2012 at 2:24 AM, Mahmood Naderan <mahmood...@gmail.com>wrote: > class L1Cache(BaseCache): > size = '64B' > assoc = 4 > block_size = 64 > latency = '1ns' > mshrs = 12 > tgts_per_mshr = 12 > > class L2Cache(BaseCache): > size = '512B' > latency = '10ns' > block_size = 64 > assoc = 16 > mshrs = 20 > tgts_per_mshr = 12 > > command line: /home/mahmood/gem5/build/X86_SE/m5.debug > configs/example/cmp.py --prog-interval=500000 -F 1000000 --maxinst > 1000000 -d --caches --l2cache -b bzip2_dryer > Global frequency set at 1000000000000 ticks per second > fatal: # of sets must be non-zero and a power of 2 > @ cycle 0 > [LRU:build/X86_SE/mem/cache/tags/lru.cc, line 58] > > > According to this post, only lru is used. > http://www.mail-archive.com/gem5-users@gem5.org/msg01511.html > > While debugging at this line (lru.cc:58), I noticed that the problem > is not "power of 2". Instead number of sets are zero: > > if (numSets <= 0 || !isPowerOf2(numSets)) { > fatal("# of sets must be non-zero and a power of 2"); > } > > On 2/9/12, Anthony Gutierrez <atgut...@umich.edu> wrote: > > What ISA, FS or SE? What is your entire command line? With a fresh > checkout > > of gem5, if I set the i and d caches to 512B, 64B block, and > associativity > > of 8, I get an error related to the fa_lru tags. If I force gem5 to use > lru > > it works fine. So, you must have some other problem. > > > > -Tony > > > > On Thu, Feb 9, 2012 at 2:17 AM, Mahmood Naderan <mahmood...@gmail.com > >wrote: > > > >> but the error points to lru.cc:58 > >> > >> if (numSets <= 0 || !isPowerOf2(numSets)) { > >> fatal("# of sets must be non-zero and a power of 2"); > >> } > >> > >> i doubt if it is related to fa_lru > >> > >> > >> On 2/9/12, Anthony Gutierrez <atgut...@umich.edu> wrote: > >> > In this case (a 512 B cache, 64 B line, 8 way) you have a fully > >> associative > >> > cache. I think the FA_LRU tags don't work properly. You need to change > >> > things to never use the FA_LRU cache, see if that helps. > >> > > >> > On Wed, Feb 8, 2012 at 1:45 PM, Mahmood Naderan <mahmood...@gmail.com > >> >wrote: > >> > > >> >> block size is 64 and assoc is 8 > >> >> > >> >> On 2/8/12, biswabandan panda <biswa....@gmail.com> wrote: > >> >> > what is the block size and associativity? > >> >> > > >> >> > On Wed, Feb 8, 2012 at 11:45 PM, Mahmood Naderan > >> >> > <mahmood...@gmail.com>wrote: > >> >> > > >> >> >> Hi, > >> >> >> For some debugging purposes, I want to set the cache size to below > >> >> >> 1kB. However when I set to 512B, it says: > >> >> >> > >> >> >> fatal: # of sets must be non-zero and a power of 2 > >> >> >> > >> >> >> -- > >> >> >> // Naderan *Mahmood; > >> >> >> _______________________________________________ > >> >> >> gem5-users mailing list > >> >> >> gem5-users@gem5.org > >> >> >> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > >> >> >> > >> >> > > >> >> > > >> >> > > >> >> > -- > >> >> > > >> >> > *thanks®ards > >> >> > * > >> >> > *BISWABANDAN* > >> >> > > >> >> > >> >> > >> >> -- > >> >> -- > >> >> // Naderan *Mahmood; > >> >> _______________________________________________ > >> >> gem5-users mailing list > >> >> gem5-users@gem5.org > >> >> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > >> >> > >> > > >> > >> > >> -- > >> -- > >> // Naderan *Mahmood; > >> _______________________________________________ > >> gem5-users mailing list > >> gem5-users@gem5.org > >> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users > >> > > > > > -- > -- > // Naderan *Mahmood; > _______________________________________________ > gem5-users mailing list > gem5-users@gem5.org > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >
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