Hi,
I am new in the area of Computer Architecture simulation. I am working on
Cache architecture of Chip Multiprocessors (CMP). I want to simulate CMP
with tile based architecture where each processor has its own L1 and L2
cache (together called tile) and all the tiles are connected by some
interconnect network. My question is
i) Can I use GEM5 for simulating such type of architecture, including
the cache memories
and the interconnects?
ii) Do I also need any commercial product with GEM5 for my task or GEM5
alone is
sufficient?
--
Regards,
SHIRSHENDU DAS
Research Scholar
Department of Computer Science and Engineering
Indian Institute of Technology Guwahati
Guwahati-39
ph: +91-9678335987
webpage: http://www.iitg.ernet.in/stud/shirshendu
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