I looked into this more, and the code that sets up the memory hierarchy
was broken a little while ago. I have a patch that seems to fix it
(attached) but then it gets stuck a little later. I remember a while ago
someone had problems with atomic operations not being supported by the
memory system fully, but I don't remember the specifics. This might be
that problem too.
Gabe
On 02/24/12 02:45, Gabriel Michael Black wrote:
> Yes, I have. You're using O3 though, and that support is fairly new.
>
> Gabe
>
> Quoting "Ankita (Garg) Goel" <[email protected]>:
>
>> Hi,
>>
>> Has anyone been able to boot multiple cpus wth FS mode on x86 ? If
>> yes, it
>> would greatly help if you could share your environmental setup. The
>> issues
>> I am facing I have already posted in some previous emails.
>>
>> Thanks for your help!
>>
>> --
>> Regards,
>> Ankita
>>
>
>
>
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# HG changeset patch
# Parent 81f2654d015b10d3f7810d75a3385aeac95b487d
Make the IO bridge accept address headed to all the local APICs.
diff --git a/configs/common/FSConfig.py b/configs/common/FSConfig.py
--- a/configs/common/FSConfig.py
+++ b/configs/common/FSConfig.py
@@ -354,7 +354,7 @@
IO_address_space_base = 0x8000000000000000
return IO_address_space_base + port
-def connectX86ClassicSystem(x86_sys):
+def connectX86ClassicSystem(x86_sys, numCPUs):
# Constants similar to x86_traits.hh
IO_address_space_base = 0x8000000000000000
pci_config_address_space_base = 0xc000000000000000
@@ -390,7 +390,8 @@
x86_sys.apicbridge.master = x86_sys.membus.slave
x86_sys.apicbridge.ranges = [AddrRange(interrupts_address_space_base,
interrupts_address_space_base +
- APIC_range_size - 1)]
+ numCPUs * APIC_range_size
+ - 1)]
# connect the io bus
x86_sys.pc.attachIO(x86_sys.iobus)
@@ -435,7 +436,7 @@
# dma controllers
self._dma_devices = [self.pc.south_bridge.ide]
else:
- connectX86ClassicSystem(self)
+ connectX86ClassicSystem(self, numCPUs)
self.intrctrl = IntrControl()
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