Hi, I am trying to Inorder 9 stage pipeline and it is stalling after the first few cycles.. This is the culprit as far as I managed to dig in by turning on traces..
The following snippets of the trace are from the same tick, one after another.. Initially it is trying to send a request to Dcache, it prints "In cache unit" and "Available slots" before allocating the slot, these two statements I had added to cpu/inorder/resources/cache_unit.cc getSlot(inst) function and cpu/inorder/resource.cc getSlot(inst) function. 45500: system.cpu.stage5: [tid:0]: [sn:7]: sending request to system.cpu.dcache_port. 45500: system.cpu.dcache_port: Before going to getslot 9 45500: system.cpu.dcache_port: In cache unit 45500: system.cpu.dcache_port: Available slots:9 45500: system.cpu.dcache_port: Allocating [slot:0] for [tid:0]: [sn:7] But the next time when getSlot is being called in resource.cc in the same tick, it does not print either of the two statements.. I am not sure what is the flow of the program, and why there should be a difference between two requests one after another.. 45500: system.cpu.stage5: [tid:0]: [sn:8]: sending request to system.cpu.dcache_port. 45500: system.cpu.dcache_port: Before going to getslot 8 45500: system.cpu.dcache_port: No slot available for [tid:0]: [sn:8] 45500: system.cpu.stage5: [tid:0]: [sn:8] request to system.cpu.dcache_port failed. Because the dcache port is never got by the instruction serial number 8, the flow of instruction gets stalled and the cpu goes to sleep for ever.. Could anyone suggest any reason for this apparent difference in behavior? Pritha
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