I remember there was a discussion about different block sizes. It wasn't possible at that time. I doubt if it possible now. Can you set equal block size and see if the simulation runs correctly?
On 4/15/12, Ankita (Garg) Goel <[email protected]> wrote: > Hi, > > When I try to run SPEC2k6 or a few PARSEC benchmarks in x86 SE mode for > larger number of instructions, I get the following assertion failure: > > gem5.opt: build/X86/mem/cache/cache_impl.hh:344: bool > Cache<TagStore>::access(Packet*, typename TagStore::BlkType*&, int&, > PacketList&) [with TagStore = LRU]: Assertion `blkSize == pkt->getSize()' > failed. > Program aborted at cycle 3651979924 > Aborted > > In my current configuration, I have private L1 & L2, with shared L3 cache. > L1 and L2 have a block size of 32 and L3 has a block size of 64. Is the > error because of these different block sizes ? Any ideas on what might be > causing this issue ? > > Thanks for your help! > > -- > Regards, > Ankita > Graduate Student > Department of Computer Science > University of Texas at Austin > -- -- // Naderan *Mahmood; _______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
