In addition to the above query, my config.ini shows a prefetcher_size of 100 for the L2 cache. Is that intended? (since it seems a little too high). Regards, Kirtika
On Fri, Apr 13, 2012 at 11:17 PM, Kirtika Ruchandani <[email protected]>wrote: > Hi, > I have a query about how the cache is configured in a full-system > simulation of an ARM cpu - > If your simulation uses fs.py like bbench, fs.py calls config_cache to > set up the cache which is defined in CacheConfig.py as follows: > > [snip] > def config_cache(options, system): > if options.l2cache: > if options.cpu_type == "arm_detailed": > system.l2 = O3_ARM_v7aL2(size = options.l2_size, assoc = > options.l2_assoc, mshrs=16,tgts_per_mshr=8, > block_size=options.cacheline_size) > else: > system.l2 = L2Cache(size = options.l2_size, assoc = > options.l2_assoc, > [snip] > > I am wondering if this is wrong in the case where the user doesn't > explicitly specify the l2 size. the default l2 size is 2Mb (I forget where > that was defined). > The class O3_ARM_v7aL2 defines size to be 1 Mb, but that gets overwritten > here, since my config.ini shows 2Mb. > Am I missing something here? > Also, aren't both 1 Mb and 2Mb unrealistic sizes for the L2? I read > somewhere that the L2 cache size can be from 0 to 1Mb in a real system - > how often is it 1Mb ? Would be the performance drop be significant at > 256/512 Kb L2? > Regards, > Kirtika > > > > > > -- -- Kirtika Ruchandani Final Year, Integrated BTech/MTech, Comp. Sci & Engg, IIT Madras
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