You have not really asked any question! -- Nilay
On Thu, 19 Apr 2012, Jiachen Xue wrote:
Hi, I am working with x86 full system simulator using O3 cpu type. The situation I have is that, for Loads/Stores, if its translation is missed in TLB, instead of have it wait till the HW page walk is done, I want to bring it back to re-execute it in the next cycle. My approach is as follows: when the instruction is deferred in "deferMemInst @ cpu/o3/inst_queue_impl.hh", a special tag is attached to instruction, and the instruction with the special tag will be brought back at the next cycle in "getDeferredMemInstToExecute @ cpu/o3/inst_queue_impl.hh". However, as soon as I have done that, those instructions being brought back won't be destructed, the destructor of BaseDynInst won't be called, but they do got committed as shown in the trace file I generated. Thanks in advance, -- Sincerely, Jiachen Xue
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