One more thing If there are SimpleMemory and AbstractMemory models, why there is only one py file AbstractMemory.py?
On 5/13/12, Tao Zhang <[email protected]> wrote: > Hi Mahmood, > > The SimpleMemory extends the AbstractMemory and is used in the latest > version of gem5. It just generates a random memory latency rather than > cycle-accurate simulation. In my opinion, it can NOT be used at all due > to the inaccuracy. Alternatively, you can use the DRAMSim2 patch in an > old version. Or, you may improve the simple memory model to get more > confidence. > > "/...The bottom line: unless you are working with simple systems, you > can no longer fake the memory system in your performance simulations > (i.e., you cannot use a simplistic model), because doing so is > guaranteed to produce garbage in, garbage out results.../" from Bruce > Jacob, <The memory systems: you can't avoid it, you can't ignore it, you > can't fake it> > > Tao > > On 05/13/2012 02:56 PM, Mahmood Naderan wrote: >> the PhysicalMemory is now called AbstractMemory >> >> The DRAM model was a definition like this: >> class DRAMMemory(PhysicalMemory): >> type = 'DRAMMemory' >> # Many of these should be observed from the configuration >> cpu_ratio = Param.Int(5,"ratio between CPU speed and memory bus >> speed") >> mem_type = Param.String("SDRAM", "Type of DRAM (DRDRAM, SDRAM)") >> mem_actpolicy = Param.String("open", "Open/Close policy") >> memctrladdr_type = Param.String("interleaved", "Mapping >> interleaved or direct") >> bus_width = Param.Int(16, "") >> act_lat = Param.Latency("2ns", "RAS to CAS delay") >> cas_lat = Param.Latency("1ns", "CAS delay") >> war_lat = Param.Latency("2ns", "write after read delay") >> pre_lat = Param.Latency("2ns", "precharge delay") >> dpl_lat = Param.Latency("2ns", "data in to precharge delay") >> trc_lat = Param.Latency("6ns", "row cycle delay") >> num_banks = Param.Int(4, "Number of Banks") >> num_cpus = Param.Int(4, "Number of CPUs connected to DRAM") >> >> But seems that it has been removed. So it is no longer possible to set >> some DRAM parameters. >> >> On 5/13/12, Tao Zhang<[email protected]> wrote: >>> They have been replaced with "abstract_mem.cc" and "simple_mem.cc". >>> >>> -Tao >>> >>> On 05/13/2012 01:13 PM, Mahmood Naderan wrote: >>>> Hi >>>> There were some physicalmemory.py , dram.cc and dram.hh files in >>>> previous releases. But seems that they are no longer available. >>>> >>>> Appreciate any comment. >>> _______________________________________________ >>> gem5-users mailing list >>> [email protected] >>> http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >>> >> > -- // Naderan *Mahmood; _______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
