Hi, I want to implement local checkpointing for a multicore system with directory based cache coherency in gem5. I mean I want to let each core take its checkpoint independently and instead of restoring the whole system in case of failure just a group of cores rollback to their last recovery line. I need to store the state of each processor by saving the register file and cache contents. As I traced the checkpoint code I understood that in each checkpoint the serialize function for every instantiated simObject is called. What I am wondering is whether I can perform this by calling serialize() and unserialize() for some components like RegFile and cpu. Is it work for my purpose or shall I do something else? I'd greatly appreciate it if anyone could guide me,
Regards, Atieh
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