Hi Rafael, The ELT platform was removed because there isn't a linux kernel available for it. IF you need it you can add the code back from a previous change set in the repository. It would be best to switch to the EMM model.
Thanks, Ali On Jun 20, 2012, at 1:58 PM, Rafael Garibotti wrote: > Hi Samuel, > > Yes, you were right. I run hake.sh with the arm_gem5 parameter and then > run make without the arm parameter. > > So, running Barrelfish on the old GEM5 revision (d45a02bd5391) with the > VExpress_ELT platform, it works. But as I said before, the new GEM5 revision > (64db8473f3ab) do not have this platform. So I started to port it to another > platform by changing the parameters found in the > "barrelfish/kernel/arch/arm_gem5" directory, as the INITRD_BASE on the init.c > file according to ramdisk address, or the PIT_BASE on the integrator.c file > according to timer (Sp804) address, and so on... > > But even with these changes, the Barrelfish did not pass the boot, at > least, it shows not message after "info: Entering event queue @ 0. Starting > simulation..." in a terminal and "==== m5 slave terminal: Terminal 0 ====" on > another. So how do you debug Barrelfish on GEM5?? > > By the way, I always get the warning "warning: Trying to access an SPSR > in invalid mode: 31". Was it not related to the ISA? Such an instruction not > supported on ARMv7 that was suported on ARMv5... So, do you have a guess > about it? > > Ps.: You included only on the GEM5 mailing list, so I put also in the > Barrelfish mailing list. > > Best Regards, > Rafael Garibotti > > > 2012/6/19 Samuel Hitz <[email protected]> > Hi Rafael, > > Did you build Barrelfish with 'make arm'? If not please try this and see if > it works. It seems like romfs_cpio_archive_size in > phys_mmap_remove(&phys_mmap, > INITRD_BASE, > INITRD_BASE + romfs_cpio_archive_size); > > in init.c:arch_init is 0 which happens if you don't build Barrelfish with > 'make arm'. > > Cheers, > > Samuel > > (adding barrelfish-mailing list. You should ask questions there so that > everyone can possibly answer you or gain something from the solutions posted) > > On Tue, Jun 19, 2012 at 4:47 PM, Rafael Garibotti <[email protected]> > wrote: > Hi Samuel, > > I tried using the GEM5 simulator with the Barrelfish, but I always got > the same error: > > ------------------------------------------------------------------- > Barrelfish CPU driver starting on ARMv7 Board id 0x000008e0 > The address of paging_map_kernel_section is 0xc0022e00 > kernel PANIC! kernel assertion "limit > start" failed at > ../kernel/arch/arm/phys_mmap.c:130 > ------------------------------------------------------------------- > > Do you know how I can fix this problem? > > I tried using the latest GEM5 revision (64db8473f3ab), but I saw that > the platform used (VExpress_ELT) is no longer available, so before starting > to migrate to another platform (i.e. RealView_PBX), I took the version > indicated in the README file (d45a02bd5391) and even making the changes > indicated, the error shown above remains. > > So, I tested the RealView_PBX platform and I needed to change the memory > size to not have two devices with the same address. After that, the > Barrelfish starting the simulation as shown below, but unfortunately it > doesn't boot... :( ... That means I need to change the bootloader... So do > you have any tips on how to proceed before I start looking for it? > > ------------------------------------------------------------------- > ..... STARTING SIMULATION > info: Entering event queue @ 0. Starting simulation... > ------------------------------------------------------------------- > > Thank you!! > > Best Regards, > Rafael Garibotti > > > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
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