What's the difference between ARM's load-load ordering and TSO? I am guessing in ARM not all instructions are flushed from pipe, but only those that are affected by the snoop. My understanding is that the O3 CPU flushes the entire pipeline when it sees that an instruction needs to execute again. Since instructions commit inorder, any load that gets squashed would mean that all subsequent loads are squashed as well.
-- Nilay On Fri, June 22, 2012 8:47 am, Ali Saidi wrote: > > > HI Dibakar, > > I'd have to think carefully about it, but you may be > right about TSO. I'd hope that someone who is more familiar with x86 > could respond. > > Thanks, > > Ali > > On 22.06.2012 07:46, Dibakar Gope > wrote: > >> Hi Ali, >> >> Thanks for the response. Ok, I got the point. I > thought that since the O3 attempts to support the TSO for X86 , so > inherently this enforces/covers the regular load-load ordering present > in any stronger consistency model. But if it inline with ARM's > requirements,then does it not violate x86 and TSO's conventional > load-load ordering? >> >> thanks, >> Dibakar > _______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
