I have implemented some of the missing cache maintenance instructions for ARM (although I haven't released a patch), and this one is similar to those. You should be able to implement them by sending a packet to all caches with the address to be invalidated - if the line is dirty, write it back to memory, if not call tags->invalidateBlk() on it.
Alternatively, you could do what is done presently for ARM and simply print a warning message that the instruction is not implemented. It shouldn't affect correctness. If this instruction is primarily used to provide software coherence for the i-cache it won't be of much use because the i-cache is already coherent in gem5. -Tony On Wed, Jun 27, 2012 at 11:45 PM, Paul V. Gratz <[email protected]> wrote: > Hi All, > I've been trying to run the Oracle/Sun Java JRE in the X86 ISA model > and so far the roadblock I'm hitting is a complaint from the java > runtime that the the CLFLUSH instruction is missing. Parsing through > the gem5 code it looks like that instruction has not been implemented. > Has anyone gotten past this point in the X86 model? Before we get > started working on it, I wanted to make sure there weren't any known > patches to implement the missing functionality. > Thanks! > Paul > > -- > ----------------------------------------- > Paul V. Gratz > Assistant Professor > ECE Dept, Texas A&M University > Office: 333D WERC > Phone: 979-488-4551 > http://www.gratz1.com/pgratz > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >
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