Hello everyone, Is it possible to dump cache states of a certain processor cycle? I mean, dumping all of the cachelines and tags from L1 and L2 caches. Since I'm very new to gem5, I really appreciate any advice and help.
Thanks, Jinwook Jung _______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
