Hi Samuel, You can use the gem5 op rpns() to get a count in ns since the start of simulation. Depending on the resolution you need there are a variety of counters and timers that you can read. Long term, we'll try to implement the performance extensions, but it's got a lot of tentacles into things.
Thanks, Ali On Jul 6, 2012, at 9:02 AM, Samuel Hitz wrote: > Ok I just saw that those registers aren't implemented in gem5. Is there an > alternative to get a cycle counter? > > cheers, > > Samuel > > On Fri, Jul 6, 2012 at 1:34 PM, Samuel Hitz <[email protected]> wrote: > Hi there, > > Is the performance monitor extension implemented in gem5? > I get an undef exception when I try to access the performance counter control > register like this > > __asm volatile ("mcr p15, 0, %0, c9, c12, 0\t\n" :: "r"(val)); > > This happens in user-mode but I did set user-mode access enable bit in > privileged mode. (which goes through, so I guess there must be something > implemented) > > Best, > > Samuel > > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
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