You haven't enabled L2 cache. Use --l2cache and see the configs/common/CacheConfig.py file.
Amin On Mon, Jul 9, 2012 at 12:58 PM, Jinwook Jung <[email protected]>wrote: > Hello all,**** > > ** ** > > I’m running a SPEC2K6 benchmarks in SE mode (gem5.fast) with different > cache latencies, and realized that cache latency doesn’t impact on overall > system cycle, system.cpu.numCycles.**** > > I mean, It’s the same for the any cache latencies, such as 20 ns or 10 ns > in L2 cache.**** > > I think, the number of system cycle would be different in various cache > latencies, are there any advices for this?**** > > I used the following script something like below.**** > > ** ** > > # build/ALPHA_SE/gem5.fast –W 1000000000 –I 3000000000 –caches {and each > cache’s size/assoc/line size/latency}**** > > ** ** > > Any help or advice would be appreciated!**** > > ** ** > > Thanks and kind,**** > > ** ** > > Jinwook Jung**** > > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >
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