Hi Ali Thank you very much for your quick answer. :-)
Regards Romulo On Wed, Jul 25, 2012 at 12:22 PM, Ali Saidi <[email protected]> wrote: > ** > > On 25.07.2012 10:03, Nilay Vaish wrote: > > On Tue, 24 Jul 2012, Romulo Curty Cerqueira wrote: > > In practice I really received error messages when I tried to simulated > more than 4 CPUs in ARM FS mode, as follows: > > ... ARM ==> gem5.opt: build/ARM/dev/arm/a9scu.cc:66: virtual Tick > A9SCU::read(PacketPtr): Assertion `sys->numContexts() > > The current code in the repository support 4 cores for ARM. If you did > some work on the linux kernel and the simulator you could support up to 8, > but after that you would need a different interrupt controller to send IPIs > between cores. > > > > Ali > > _______________________________________________ > gem5-users mailing list > [email protected] > http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users >
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