Hi All, In O3CPU full system simulation, I was wondering that once we restore a checkpoint at ROI, is it possible for the linux scheduler to de-allocate a thread in a core and merge its workload with another core? Here below is the fetched instruction count on a 4-core distributed shared l2 cache CMP (restoring checkpoint at ROI, so the stats showed are for ROI, followed by the final serial region) with two frameworks (same o3cpu config) that can differ slightly on servicing load-store requests. The fetched instructions in cpu1 and cpu2 changes abruptly in opposite way from one framework to other. However the cumulative committed instructions count remains the same across both. So is it the linux scheduler that influencing all that or something else? Or is it due to the Alpha quiesce instruction that suspends a thread/context in a core, then later the scheduler merging that thread's workload on another core in absence of an incoming IPI to wake that up on the first core. The only way the two frameworks differ is in servicing a load/store request from either a particular L2 slice or the other.
system.cpu0.fetch.Insts 2123965 # Number of instructions fetch has processed system.cpu1.fetch.Insts 1972966 # Number of instructions fetch has processed system.cpu2.fetch.Insts 2117941 # Number of instructions fetch has processed system.cpu3.fetch.Insts 1867832 # Number of instructions fetch has processed system.cpu0.fetch.Insts 816656 # Number of instructions fetch has processed system.cpu1.fetch.Insts 923009 # Number of instructions fetch has processed system.cpu2.fetch.Insts 559133 # Number of instructions fetch has processed system.cpu3.fetch.Insts 12116 # Number of instructions fetch has processed system.cpu0.fetch.Insts 2123993 # Number of instructions fetch has processed system.cpu1.fetch.Insts 139397 # Number of instructions fetch has processed system.cpu2.fetch.Insts 3807203 # Number of instructions fetch has processed system.cpu3.fetch.Insts 1805577 # Number of instructions fetch has processed system.cpu0.fetch.Insts 1501332 # Number of instructions fetch has processed system.cpu1.fetch.Insts 6782 # Number of instructions fetch has processed system.cpu2.fetch.Insts 556267 # Number of instructions fetch has processed system.cpu3.fetch.Insts 234494 # Number of instructions fetch has processed Thanks, Dibakar _______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
