After digging through the older posts, here is the solution. The simulation is actually running. Just need to use m5term (http://www.m5sim.org/M5term) to access the simulated system.
--Carole On Sun, Aug 19, 2012 at 4:24 PM, Carole-Jean Wu <carol...@princeton.edu> wrote: > Hi, > > I am booting Android-gb on ARM with the following command. However, > the simulation doesn't seem to make forward progress. > > Has anyone experienced this and know the fixes? > > gem5-stable$ ./build/ARM/gem5.opt configs/example/fs.py -b bbench-gb > --kernel=vmlinux.smp.mouse.arm > > Global frequency set at 1000000000000 ticks per second > info: kernel located at: /dist/m5/system/binaries/vmlinux.smp.mouse.arm > Listening for system connection on port 5901 > Listening for system connection on port 3457 > 0: system.remote_gdb.listener: listening for remote gdb #0 on port 7001 > info: Using bootloader at address 0x80000000 > **** REAL SIMULATION **** > info: Entering event queue @ 0. Starting simulation... > warn: The clidr register always reports 0 caches. > warn: clidr LoUIS field of 0b001 to match current ARM implementations. > warn: The csselr register isn't implemented. > warn: instruction 'mcr bpiallis' unimplemented > warn: instruction 'mcr icialluis' unimplemented > warn: The ccsidr register isn't implemented and always reads as 0. > warn: instruction 'mcr dccimvac' unimplemented > warn: instruction 'mcr dccmvau' unimplemented > warn: instruction 'mcr icimvau' unimplemented > warn: instruction 'mcr bpiallis' unimplemented > warn: LCD dual screen mode not supported > warn: instruction 'mcr bpiallis' unimplemented > warn: instruction 'mcr icialluis' unimplemented > warn: instruction 'mcr bpiallis' unimplemented > > **Stalling** > > Thanks, > Carole _______________________________________________ gem5-users mailing list gem5-users@gem5.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
