On Thu, 4 Oct 2012, Cookie wrote:
Hi,I have some questions about the cache access in Ruby. As shown in file src/mem/protocol/MESI_CMP_directory-L1.sm: -------------------------------------------------------------------------------------------------------------------------------- in_port(mandatoryQueue_in, RubyRequest, mandatoryQueue, desc="...", rank = 0) { ... ... // *** DATA ACCESS *** Entry L1Dcache_entry := getL1DCacheEntry(in_msg.LineAddress); if (is_valid(L1Dcache_entry)) { // The tag matches for the L1, so the L1 ask the L2 for it *trigger(mandatory_request_type_to_event(in_msg.Type), in_msg.LineAddress,* * L1Dcache_entry, L1_TBEs[in_msg.LineAddress]);* } else { ... ... if (L1DcacheMemory.cacheAvail(in_msg.LineAddress)) { // L1 does't have the line, but we have space for it in the L1 let's see if the L2 has it * trigger(mandatory_request_type_to_event(in_msg.Type), in_msg.LineAddress,* * L1Dcache_entry, L1_TBEs[in_msg.LineAddress]);* } ... ... } } --------------------------------------------------------------------------------------------------------------------------------------- 1/ why the two triggered actions are the same? I've no idea when the L1Dcache_entry is valid (which I think means there is the requested block available in the L1D cache), why it still asks the L1 for it (as commented) by triggering the same action as if the cache block is not in L1D? I think it should be responded to the processor. Is it correct? If so, should the action be "send data to requestor" or anything else? I am really confused with the cache access part in Ruby, could you please give me any instructions/explanations?
I believe there are enough comments in that part of the code. Read those comments and then post any questions you might have.
2/ the function is_valid(xxx) is called many times in the *.sm files. But I've no idea where it is defined?
It is intrinsic to the SLICC compiler. Just grep for is_valid, you found where it is defined.
-- Nilay _______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
