I am using gem5 simulator to trace each block in l2 cache. But I only get ReadReq, ReadExReq, and Writebace commands in l2 cache.
Is the ReadExReq in l2 cache equal to the WriteReq command in l1 cache? I have checked the cache_impl.hh. The writeDataToBlock() function is executing when l1 cache do WriteReq and l2 cache do Writeback. Anyone could help me to find the codes that writing a data to l2 cache block? Thanks a lot. _______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
