Correction to both use of cache and units for cache size: bpayne@bpayne-VirtualBox64:~/gem5$ build/X86/gem5.opt configs/example/se.py --clock=2.8GHz --caches --l1d_size=32kB --l1i_size=32kB --l2cache --l2_size=256kB --l3_size=8192kB -c tests/test-progs/hello/bin/x86/linux/hello
-----Original Message----- From: [email protected] [mailto:[email protected]] On Behalf Of Payne, Benjamin Sent: Thursday, November 01, 2012 3:45 PM To: gem5 users mailing list Subject: Re: [gem5-users] validation of x86 Here is an update for anyone who was wondering how to compare a real computer to the gem5 simulator. The L1i (instruction), L1d (data), L2, L3 cache sizes can be determined in linux by bpayne@bpayne-Alien:~$ cat /sys/devices/system/cpu/cpu0/cache/index0/type Data bpayne@bpayne-Alien:~$ cat /sys/devices/system/cpu/cpu0/cache/index0/size 32K bpayne@bpayne-Alien:~$ cat /sys/devices/system/cpu/cpu0/cache/index1/type Instruction bpayne@bpayne-Alien:~$ cat /sys/devices/system/cpu/cpu0/cache/index1/size 32K bpayne@bpayne-Alien:~$ cat /sys/devices/system/cpu/cpu0/cache/index2/size 256K bpayne@bpayne-Alien:~$ cat /sys/devices/system/cpu/cpu0/cache/index3/size 8192K The processor clock speed is found from bpayne@bpayne-Alien:~$ cat /proc/cpuinfo processor : 0 vendor_id : GenuineIntel cpu family : 6 model : 26 model name : Intel(R) Core(TM) i7 CPU 930 @ 2.80GHz stepping : 5 microcode : 0x11 cpu MHz : 1600.000 cache size : 8192 KB You'll notice the "cache size" reported by cat /proc/cpuinfo is the L3 cache size for this system. These parameters can then be specified to gem5 using the following: bpayne@bpayne-VirtualBox64:~/gem5$ build/X86/gem5.opt configs/example/se.py --clock=2.8GHz --l1d_size=32K --l1i_size=32K --l2_size=256K --l3_size=8192K -c tests/test-progs/hello/bin/x86/linux/hello To automate this command and assuming the host system is the one we want to emulate, we could run bpayne@bpayne-VirtualBox64:~/gem5$ build/X86/gem5.opt configs/example/se.py --clock=2.8GHz --l1d_size=` cat /sys/devices/system/cpu/cpu0/cache/index0/size` --l1i_size=` cat /sys/devices/system/cpu/cpu0/cache/index1/size ` --l2_size=` cat /sys/devices/system/cpu/cpu0/cache/index2/size ` --l3_size=` cat /sys/devices/system/cpu/cpu0/cache/index3/size ` -c tests/test-progs/hello/bin/x86/linux/hello We could grab the 2.8GHz from something like cat /proc/cpuinfo | grep GHz but my shell-fu is weak. Ben -----Original Message----- From: [email protected] [mailto:[email protected]] On Behalf Of Nilay Vaish Sent: Monday, October 29, 2012 3:57 PM To: gem5 users mailing list Subject: Re: [gem5-users] validation of x86 On Mon, 29 Oct 2012, Payne, Benjamin wrote: > Thanks for the advice Nilay. I found the following: > > Line 173 of convert.py is the error message, so I go back to the top > of the function and see that "toFrequency" is being called. On line > 119, the toFrequency function is looking for "THz" or "GHz" or "MHz". > Thus my command '2.8Ghz' was using the wrong case. > > build/X86/gem5.opt configs/example/se.py -c bench.lex --clock='2.8GHz' > > works as desired, in that the processor is closer to what I want to > simulate: an Intel Core i7-930 @ 2.8GHz. > > When I use 2.8GHz, the reported CPU time is 0.06 seconds, and just > 0.01 seconds when I use 10GHz. That is as expected since > 0.06/(10/2.8)=0.0168. > > Now I am back to my original question: how to most accurately simulate > a real x86 processor for comparison? > > From cat /proc/cpuinfo, the "cache size" is reported as 6144KB. The > specifications sheet > http://ark.intel.com/products/41447/Intel-Core-i7-930-Processor-8M-Cac > he-2_80-GHz-4_80-GTs-Intel-QPI reports that "Intel Smart Cache" is > 8MB. > > How would I give this information to gem5? Reading the documentation provided on gem5.org is a highly recommended. In particular, I believe the information on the page http://gem5.org/Running_gem5 should be useful for you. > > [Suggestion: a script which can be run on a real system (ie it queries > /proc/cpuinfo and /proc/meminfo) and gives the command line arguments > for an equivalent gem5 simulation.] > You have all the code available. Change it in whatever way you like. -- Nilay _______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users _______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users _______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
