Hello Thank you for videos on gem5 installation. I have a problem, I was wondering if you could help me with. when I run sudo scons build/ARM/gem5.opt -j2 it freezes on te below line: ARM/arch/arm/generated/03_cpu_exex.cc -> o I am running it on Ubuntu 12.04 on vmware player. My processor is a intel dual core.
by the way , I use sudo because on my first try I just typed scons build/ARM/gem5.opt -j2 it gave me an error saying it couldn't relocate virtual memory. Could you help me? Thank you, Parnian ________________________________________ From: [email protected] [[email protected]] on behalf of Ali Saidi [[email protected]] Sent: Friday, November 02, 2012 1:04 PM To: [email protected] Subject: [gem5-dev] changeset in gem5: mem: fix use after free issue in memories unt... changeset 844f9e724343 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=844f9e724343 description: mem: fix use after free issue in memories until 4-phase work complete. diffstat: src/mem/simple_dram.cc | 9 ++++++++- src/mem/simple_dram.hh | 6 ++++++ src/mem/simple_mem.cc | 8 +++++++- src/mem/simple_mem.hh | 6 ++++++ 4 files changed, 27 insertions(+), 2 deletions(-) diffs (79 lines): diff -r 44d31345e360 -r 844f9e724343 src/mem/simple_dram.cc --- a/src/mem/simple_dram.cc Fri Nov 02 11:50:06 2012 -0500 +++ b/src/mem/simple_dram.cc Fri Nov 02 11:50:16 2012 -0500 @@ -474,6 +474,13 @@ bool SimpleDRAM::recvTimingReq(PacketPtr pkt) { + /// @todo temporary hack to deal with memory corruption issues until + /// 4-phase transactions are complete + for (int x = 0; x < pendingDelete.size(); x++) + delete pendingDelete[x]; + pendingDelete.clear(); + + // This is where we enter from the outside world DPRINTF(DRAM, "Inside recvTimingReq: request %s addr %lld size %d\n", pkt->cmdString(),pkt->getAddr(), pkt->getSize()); @@ -495,7 +502,7 @@ // simply drop inhibited packets for now if (pkt->memInhibitAsserted()) { DPRINTF(DRAM,"Inhibited packet -- Dropping it now\n"); - delete pkt; + pendingDelete.push_back(pkt); return true; } diff -r 44d31345e360 -r 844f9e724343 src/mem/simple_dram.hh --- a/src/mem/simple_dram.hh Fri Nov 02 11:50:06 2012 -0500 +++ b/src/mem/simple_dram.hh Fri Nov 02 11:50:16 2012 -0500 @@ -453,6 +453,12 @@ Stats::Formula writeRowHitRate; Stats::Formula avgGap; + /** @todo this is a temporary workaround until the 4-phase code is + * committed. upstream caches needs this packet until true is returned, so + * hold onto it for deletion until a subsequent call + */ + std::vector<PacketPtr> pendingDelete; + public: void regStats(); diff -r 44d31345e360 -r 844f9e724343 src/mem/simple_mem.cc --- a/src/mem/simple_mem.cc Fri Nov 02 11:50:06 2012 -0500 +++ b/src/mem/simple_mem.cc Fri Nov 02 11:50:16 2012 -0500 @@ -94,10 +94,16 @@ bool SimpleMemory::recvTimingReq(PacketPtr pkt) { + /// @todo temporary hack to deal with memory corruption issues until + /// 4-phase transactions are complete + for (int x = 0; x < pendingDelete.size(); x++) + delete pendingDelete[x]; + pendingDelete.clear(); + if (pkt->memInhibitAsserted()) { // snooper will supply based on copy of packet // still target's responsibility to delete packet - delete pkt; + pendingDelete.push_back(pkt); return true; } diff -r 44d31345e360 -r 844f9e724343 src/mem/simple_mem.hh --- a/src/mem/simple_mem.hh Fri Nov 02 11:50:06 2012 -0500 +++ b/src/mem/simple_mem.hh Fri Nov 02 11:50:16 2012 -0500 @@ -118,6 +118,12 @@ EventWrapper<SimpleMemory, &SimpleMemory::release> releaseEvent; + /** @todo this is a temporary workaround until the 4-phase code is + * committed. upstream caches needs this packet until true is returned, so + * hold onto it for deletion until a subsequent call + */ + std::vector<PacketPtr> pendingDelete; + public: SimpleMemory(const SimpleMemoryParams *p); _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev _______________________________________________ gem5-users mailing list [email protected] http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
