Hi, We have developed such a tool at The university Of Thessaly in the Department Of Computer & Communication Engineering. It allows fault Injection in memory , register file(floating, integer, misc) , fetch stage , Decoder stage and IEW stage. Fault Injection is performed on the ALPHA isa on FS mode. Here is a link for the current implementation : http://inf-server.inf.uth.gr/~koparasy/. The site is under construction so you may find some typos and the source code is not yet available. However when the christmas vacation is over I intend to upload the source code and a more specific Documentation. Feel free to ask me any questions you want. Regards Kostantinos Parasyris.
Quoting farshad firouzi <[email protected]>:
Hi everybody I want to investigate the behavior of workloads in the presence of transient faults. For this purpose I decided to inject the fault (bit flip model) into the register file, instruction fetch, Decoder, output of ALU, ROB,and memory I am wondering if somebody already performed this task. I really appreciate if somebody could give me some hints where and in which classes I should start working since I am not familiar with Gem5 at all. Moreover, I need to compare the fault injection models with golden model (fault free model) for around 1000 clock cycles. is there any low-cost method for implementing this approach. Thanks a lot. Regards, Farshad
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