Hello I've faced a problem during running PARSEC Multi-threaded benchmarks on gem5 in "fs" mode First I've used "writescripts.pl" to make a 4thread benchmark.For this reason I used this command:
./writescripts.pl 'dedup' 4 Then I've ran it on a system with 4 cores: ./build/ALPHA/gem5.debug --debug-flags=Exec --trace-file=/home/dsrt/gem5/gem5-1d983855df2c/trace/alpha-d_4t_4cpu_exec.out configs/example/fs.py --cpu-type="detailed" --caches --l2cache --script=/home/dsrt/gem5/dedup_4c_simsmall.rcS -m 5000000000 -n 4 As you can see, I used "debug-flags=Exec" to see how threads run on different cores. But in the trace file I've found that common instructions are running on different cores and it seems that there is just one thread for running this benchmark. How can I run a Multi-threaded benchmark on a Multi-core processor, whereas different threads run on different cores. Here I present a part of my trace file to show that there are same instructions run on all cores: 187500: system.cpu0 T0 : @sys_reset+81 : hw_mfpr IPR(0x140),r31 : IprAccess : D=0x0000000000000000 196500: system.cpu1 T0 : @sys_reset+73 : hw_mfpr IPR(0x140),r31 : IprAccess : D=0x0000000000000000 187500: system.cpu0 T0 : @sys_reset+85 : hw_mtpr r31,IPR(0x210) : IprAccess : D=0x0000000000000000 187500: system.cpu0 T0 : @sys_reset+89 : lda r11,7(r31) : IntAlu : D=0x0000000000000007 187500: system.cpu0 T0 : @sys_reset+93 : lda r1,31(r31) : IntAlu : D=0x000000000000001f 196500: system.cpu1 T0 : @sys_reset+77 : hw_mfpr IPR(0x140),r31 : IprAccess : D=0x0000000000000000 196500: system.cpu1 T0 : @sys_reset+81 : hw_mfpr IPR(0x140),r31 : IprAccess : D=0x0000000000000000 196500: system.cpu1 T0 : @sys_reset+85 : hw_mtpr r31,IPR(0x210) : IprAccess : D=0x0000000000000000 196500: system.cpu1 T0 : @sys_reset+89 : lda r11,7(r31) : IntAlu : D=0x0000000000000007 196500: system.cpu1 T0 : @sys_reset+93 : lda r1,31(r31) : IntAlu : D=0x000000000000001f Would you please help me. Thank you Best Regards -- Bahar Asgari Department of Computer Engineering Iran University of Science and Technology
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